Xilinx, Inc.

Vishwak R Manda

Santosh Yachareni

Shidong Zhou

Jing Jing Chen

Sree Rkc Saraswatula

Michael Tsivyan

A circuit for accessing memory elements in an integrated circuit device is described. The circuit comprises a first plurality of memory elements; first line drivers, each of the first line drivers configured to provide a signal to a memory element of the first plurality of memory elements; first line driver buffers configured to control the signals provided by the first line drivers to the first plurality of memory elements; a second plurality of memory elements; second line drivers, each of the second line drivers configured to provide a signal to a memory element of the second plurality of memory elements; second line driver buffers configured to control the signals provided by the second line drivers to the second plurality of memory elements; and wherein one or both of the first line driver buffers and the second line driver buffers are configured to be selectively disabled.

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Hyderabad Telangana, India

Vishwak R Manda