Lsi Logic Corporation

Lsi Corporation

Vishnu Balan

Narendra M K Rao

Ye Liu

Jenn-Gang Chern

Joseph Caroselli

Tzu-Wang Pan

Chintan M Desai

A multi-phase adaptive decision feedback equalizer minimizes post-cursor inter-symbol interference in a current data bit based on values of subsequent data bits in a data communication system. In one form, the receiver includes a plurality of modules each having a respective adaptive decision feedback equalizer. A processor responsive to output signals from each of the plurality of modules generates a plurality of coefficient values. The adaptive decision feedback equalizer has a plurality of taps receiving a respective output signal from one of the modules and a respective coefficient value to generate a respective correction signal. The correction signals are summed with the data signal and processed to recover the data. Pre-calculation of coefficients permits rapid selection of data. Multi-phase operation permits higher data frequencies.

Serial data link using decision feedback equalization

A circuit controls an oscillation amplitude of a crystal oscillator including a crystal resonator, a current source supplying a bias current, and an output transistor coupled to the crystal resonator and the current source. The circuit includes a peak detector for detecting a peak voltage of an output signal of the crystal oscillator, and a controller coupled to the peak detector and to the current source for controlling the current source in accordance with a difference between the peak voltage and a target voltage, the target voltage being set to be substantially equal to 2V , where V is a threshold voltage of the output transistor. A frequency control circuit controls a first switched-capacitor array and a second switched-capacitor array coupled to the crystal resonator, and alternately switches a unit capacitor in the first switched-capacitor array and a unit capacitor in the second switched-capacitor array based on a frequency control signal.

Method and apparatus for controlling oscillation amplitude and oscillation frequency of crystal oscillator

An amplifier circuit includes a first input device coupled to a first input node and controlling a first current, a second input device coupled to a second input node and controlling a second current, a current source device coupled to a bias node and controlling a summed current of the first and second currents, a current mirror circuit, a first feedback circuit, a second feedback circuit, and a capacitor. The current mirror circuit generates a load current by mirroring the first current so as to provide an output signal voltage to an output node couple to the second output node. The first feedback circuit supplies a mirrored first current to the bias node, and the second feedback circuit pulls a mirrored second current from the bias node. The capacitor is coupled to the bias node and provides the bias voltage to the current source device.

Self-biased amplifier circuit and method for self-basing amplifier circuit

A low voltage bipolar transconductor circuit with extended dynamic range is disclosed. The transconductance circuit provides a differential current output signal and generally comprises a first and a second differential pair of transistors coupled to a differential input signal and to a load, and having transistors area ratios of 1:r and r:1, respectively. The transconductance circuit further comprises at least one first pair of diodes having positive nodes coupled to each other and to the load, negative nodes coupled to the first differential transistors, and a diode area ratio of r:1, and a least one second pair of diodes having positive nodes coupled to each other and to the load, negative nodes coupled to the second differential transistors, and having a diode area ratio of 1:r.

Low voltage bipolar transconductor circuit with extended dynamic range

A low power, high performance circuit for magnitude and group delay shaping in continuous-time read channel filters is disclosed. The circuit generally comprises a first and a second biquadratic circuit, each having an input, a band pass, and a output low pass node, where the second biquadratic input node is coupled to the first biquadratic output node, and a first and second transconductor coupled to the first biquadratic band pass node and also to the second biquadratic band pass and low pass output nodes, respectively. The first and second transconductors are preferably programmable transconductors.

Growing community of inventors

San Jose, CA, United States of America

Vishnu Balan