International Business Machines Corporation

Vishal Khatri

Marcel A Kossel

Pier Andrea Francese

Matthias Braendli

The present disclosure relates to a method for quadrature error correction using a frequency divider circuit. The method comprises delaying input of data to master input terminals and/or slave input terminals of the frequency divider circuit for correcting a quadrature error between the in-phase and quadrature-phase output signals.

Clock divider with quadrature error correction

Embodiments relate to a decision feedback equalizer configured for a half-rate operation. The decision feedback equalizer includes a single summer stage and a direct feedback path configured to provide feedback to the single summer stage. The decision feedback equalizer further includes an even sampler configured to sample even data of an output signal of the single summer stage, an odd sampler configured to sample odd data of the output signal of the single summer stage and a plurality of 2:1 multiplexers arranged in the direct feedback path. The plurality of 2:1 multiplexers are configured to feed the even and odd data in an alternating manner back to the single summer stage, thereby adapting the feedback to the half-rate operation of the decision feedback equalizer. A corresponding memory system and design structure are also provided.

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Gonda, India

Vishal Khatri