Integrated Device Technology, Inc.

Maxim Integrated Products, Inc.

A-sat Corporation

Viresh Patel

Ajay Kumar Ghai

Robert A Gubser

Mohan Kirloskar

Hemant D Desai

Dan Allen

Viren V Khandekar

Ahmad Ashrafzadeh

Karthik Thambidurai

Jitesh Shah

Kenneth Astrof

In some embodiments, a spectrometer is presented. In accordance with some embodiments, the spectrometer includes an optical sensor array, the optical sensor array including a substrate and an array of pixels formed on the substrate; a spectral filter array formed over the pixels of the optical sensor array, the spectral filter array filtering incident light such that each pixel receives light of a spectral transmission profile associated with the pixel; a transparent spacer formed over the spectral filter array; and an opaque mask having input apertures allowing light through the transparent spacer and onto a portion of the spectral filter array. The spectrometer can be formed from the optical sensor array using a combination of photolithographic techniques and bonding of certain layers.

Monolithic spectrometer

Techniques for forming a wafer level package device are disclosed. In one or more embodiments, the techniques include forming a wafer level lead frame on a carrier wafer and electrically connecting the wafer level lead frame to an active semiconductor wafer. The carrier wafer and the active semiconductor wafer have at least substantially the same coefficients of thermal expansion. The carrier wafer can be removed from the wafer level package device, and a number of connectors can be formed on the wafer level package device. The wafer level package device can be singulated to form chip packages, such as DFN or QFN packages.

Wafer level package device formed using a wafer level lead frame on a carrier wafer having a similar coefficient of thermal expansion as an active wafer

An integrated circuit device includes an integrated circuit substrate having an at least two piece package thereon. The package has a sealed cavity therein and a patterned metal inductor in the cavity. The inductor has at least a first terminal electrically coupled to a portion of the integrated circuit substrate by an electrically conductive via, which extends at least partially through the package. The package, which may include a material selected from a group consisting of glass and ceramics, includes a base and a cap sealed to the base. The metal inductor includes a metal layer patterned on at least one of the cap and base of the package. The base may also include first and second electrically conductive vias therein, which are electrically connected to first and second terminals of the inductor.

Integrated circuit device substrates having packaged inductors thereon

A crystal oscillator fabrication method includes depositing mounting cement onto first and second mounting pads on a substrate to thereby define first and second electrode adhesion bumps. First and second electrodes of a crystal oscillator are electrically connected to the first and second mounting pads by contacting the first and second electrodes to the first and second electrode adhesion bumps and then curing the adhesion bumps. Next, mounting cement is deposited onto the first electrode and onto a portion of the first electrode adhesion bump to thereby define a top electrode adhesion extension. The top electrode adhesion extension is then cured.

Crystal oscillator fabrication methods using dual-deposition of mounting cement and dual-curing techniques

The present invention relates to a method and apparatus for an isolating structure. Embodiments of the present invention provide a robust packaging process and a mechanical filter to reduce the mechanical shock from impact. The mechanical filter can be integrated within the package substrate as part of the packaging process, reducing the assembly complexity.

Method and apparatus for an isolating structure

A packaged integrated circuit includes an integrated circuit substrate and a cap bonded to a surface of the integrated circuit substrate. The cap has a recess therein that is at least partially lined with at least one segment of an inductor. This inductor may be electrically coupled to an electrical component within the integrated circuit substrate. In some embodiments, the inductor is patterned to extend along a sidewall and interior top surface of the recess, which extends opposite the integrated circuit substrate. The inductor may include a plurality of arcuate-shaped segments and may be patterned to be symmetric about a center-tapped portion thereof. The cap may also include a magnetic material therein that increases an effective inductance of the inductor relative to an otherwise equivalent cap and inductor combination that is devoid of the magnetic material.

Packaged integrated circuits having high-Q inductors therein and methods of forming same

An integrated circuit device includes an integrated circuit substrate having a two piece package thereon. The package has a hermetically sealed cavity therein and a crystal resonator within the cavity. The crystal resonator includes at least one electrode electrically coupled to a portion of the integrated circuit substrate by an electrically conductive via, which extends at least partially through the package. The package may include a material selected from a group consisting of glass and ceramics. The crystal resonator includes a crystal blank and first and second electrodes on first and second opposing sides of the crystal blank. The package includes a base having a recess therein and a cap hermetically sealed to the base. The cap includes first and second electrical traces thereon, which are electrically connected to the first and second electrodes of the crystal resonator.

Integrated circuit device substrates having packaged crystal resonators thereon

This invention relates generally to semiconductor manufacturing and packaging and more specifically to semiconductor manufacturing in MEMS (Microelectromechanical systems) inertial sensing products. Embodiments of the present invention provide a robust packaging process and a mechanical filter to reduce the mechanical shock from impact. The mechanical filter can be integrated within the package substrate as part of the packaging process, reducing the assembly complexity.

Method and apparatus for an integrated isolation mechanical filter with substrate based package

An integrated circuit package is provided. The package includes a die attach pad having a first side and a second side. A first semiconductor die is mounted to the first side of the die attach pad, a plurality of contact pads disposed in close proximity to the first semiconductor die. A first plurality of wire bonds connect the first semiconductor die and ones of the contact pads. An overmold encapsulates the first plurality of wire bonds and the first semiconductor die, the die attach pad and the contact pads being embedded in the overmold. A plurality of leads are disposed proximal the second side of the die attach pad. A second semiconductor die is mounted to one of the second side of the die attach pad and ones of the plurality of leads such that the ones of the plurality of leads are electrically connected to the second semiconductor die. The second semiconductor die and the leads are embedded in an encapsulant. The die attach pad shields the second semiconductor die.

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Austin, TX, United States of America

Viresh Patel