Anokiwave, Inc.

International Business Machines Corporation

Qorvo Texas, LLC

Sabertek

Vipul Jain

Nitin Jain

David W Corman

Robert J McMorrow

Kristian N Madsen

Robert Ian Gresham

Jonathan P Comeau

Gaurav Menon

Jason Leo Durbin

Wade C Allen

Shamsun Nahar

Timothy Carey

Noyan Kinayman

Scott R Humphreys

Trang Thai

Andrew Michael Street

Shmuel Ravid

Kevin B Greene

Amir Esmaili

Michael Coolen

Lewis N Cohen

Scott Kevin Reynolds

Susanne A Paul

Brian Allan Floyd

Arun Sridhar Natarajan

Farbod Behbahani

Mikhail Shirokov

Amr Ibrahim

Pavel Brechko

Chad Cookinham

Guarav Menon

Lew Cohen

Amir Esmali

Exemplary embodiments include RF integrated circuit (RFIC) chips including programmable on-chip element swapping circuitry, channel swapping circuitry, and/or phase rotation circuitry to allow a common software implementation or parameter computation to be used across multiple products having different arrangements and orientations of RFICs and elements.

Integrated circuit chips for a phased array system including programmable on-chip element swapping, channel swapping, and/or phase rotation circuitry

Register banks are used to allow for fast beam switching in a phased array system. Each beam forming channel is associated with a register bank containing M register sets for configuring such things as gain/amplitude and phase parameters of the beam forming channel. The register banks for all beam forming channels can be pre-programmed and then fast beam switching circuitry allows all beam forming channels across the array to be switched to use the same register set from its corresponding register bank at substantially the same time, thereby allowing the phased array system to be quickly switched between various beam patterns and orientations. Active power control circuitry may be used to control the amount of electrical power provided to or consumed by one or more individual beam forming channels such as to reduce DC power consumption of the array and/or to selectively change the effective directivity of the array.

Phased array control circuit for controlling directivity of a beam-formed signal

A phased array system has a substrate, a plurality of elements, and a plurality of beamforming ICs. Each beamforming IC has a first set of element interfaces and a second set of element interfaces. The first set of element interfaces may be configured to be polarized in a first polarization, while the second set of element interfaces may be configured to be polarized in a second (different) polarization. Each beamforming IC has a first common interface electrically coupled with its first set of element interfaces and, in a corresponding manner, each beamforming IC also has a second common interface electrically coupled with its second set of element interfaces. The system further has an interconnect element (e.g., a circuit trace, metallization on a PCB, etc.) electrically coupling the first common interface with the second common interface of another beamforming IC.

Antenna and PCB layout topology designs for frequency scalability in PCB technology for antenna arrays

A system and a method for performing correction of systematic error for electronically steered antennas using on-chip programming. A plurality of channels includes a first channel. Each channel is coupled to a respective antenna element and includes a trim control circuit and a phase control circuit. The first channel is coupled to a first respective antenna element. An array calibration memory stores a plurality of phase offsets including a first phase offset. Each phase offset includes an array level calibration phase offset corresponding to a respective channel. The first phase offset corresponds to the first channel. At least one of the trim control circuit and the phase control circuit of the first channel are configured to modify phase of a first signal provided to and/or received from the first respective antenna element. The phase of the first signal is modified based at least in part on the first phase offset.

Correction of systematic error for electronically steered antennas using on-chip programming

A laminar phased array has a first sub-array configured to operate in one of a receive mode with a first polarity and a transmit mode with a second polarity, and a second sub-array configured to operate in one of a receive mode with the second polarity and a transmit mode with the first polarity. The first polarity is physically orthogonal to the second polarity. The array also has a controller configured to control the first and second sub-arrays so that they operate together in either 1) a receive mode or 2) a transit mode. Accordingly, both sub-arrays are configured to operate at the same time to receive signals in the first and second polarities when in the receive mode. In a corresponding manner, both sub-arrays are configured to operate at the same time to transmit signals in the first and second polarities when in the transmit mode.

Cross-polarized time division duplexed antenna

A conditioning integrated circuit (CDIC) chip can be used to aggregate signals to/from a number of beam forming integrated circuit (BFIC) chips, and signals to/from a number of CDIC chips can be aggregated by an interface integrated circuit (IFIC) chip. The CDIC chip includes temperature compensation circuitry to adjust the gain of the transmit and receive signals as a function of temperature based on inputs from a temperature sensor. The CDIC may include a plurality of beam forming channels each having a transmit circuit and a receive circuit, a common port coupled to the beam forming channels for selectively providing a common transmit signal to the beam forming channels and receiving a common receive signal from the beam forming channels, and a temperature compensation circuit configured to provide variable attenuation to the common transmit signal and the common receive signal based on a temperature sense signal.

Phased array architecture with distributed temperature compensation and integrated up/down conversion

A phased array system has a plurality of beam-forming elements, and a plurality of beam-forming integrated circuits in communication with the beam-forming elements. Each beam-forming integrated circuit has a corresponding register bank with a plurality of addressable and programmable register sets. In addition, each beam-forming integrated circuit has at least two different types of beam-forming ports. Specifically, each beam-forming element has a serial data port for receiving serial messages, and a parallel mode data port for receiving broadcast messages. Both the serial and broadcast messages manage the data in its register bank. The beam-forming integrated circuits receive the broadcast messages in parallel with the other beam-forming integrated circuits, while the beam-forming integrated circuits receive the serial messages serially&#x2014;sequentially with regard to other beam-forming integrated circuits.

Phased array with low-latency control interface

A beamforming integrated circuit system is configured to optimize performance. Among other things, the system may run at a lower power than conventional integrated circuits, selectively disable branches to control certain system functions, and/or selectively position ground pads around receiving pads to enhance isolation. The system also may use a beamforming integrated circuit as a distribution circuit for a number of similar or like beamforming integrated circuits.

Beamforming integrated circuit, AESA system and method

A phased array includes a laminar substrate having both 1) a plurality of elements forming a patch phased array, and 2) a plurality of integrated circuits. Each integrated circuit is configured to control receipt and transmission of signals by the plurality of elements in the patch phased array. The integrated circuits also are configured to operate the phased array at one or more satellite frequencies&#x2014;to transmit signals to and/or receive signals from a satellite. Each integrated circuit physically couples with one corresponding element so that incoming signals are received by the corresponding element in a first polarization, and outgoing signals are transmitted by the corresponding element in a second polarization. The phased array isolates the transmit signals from the receive signals by orienting the first and second polarizations differently.

Laminar phased array with polarization-isolated transmit/receive interfaces

A phased antenna array system is provided that includes a beamforming integrated circuit and beamforming elements in communication with the integrated circuit disposed on a substrate. The beamforming integrated circuit includes multiple radio frequency (RF) signal ports. One or more of the RF signal ports includes an RF signal pad disposed between an edge of the integrated circuit and an internal RF ground pad. The RF signal pad and the internal RF ground pad of the RF signal port are oriented perpendicular with respect to the edge of the integrated circuit. Specifically, the RF signal pad has a first side disposed on or adjacent to the edge of the integrated circuit and an opposing second side that is adjacent to the internal RF ground pad. A method of controlling the phased antenna array system is also provided.

Beamforming integrated circuit having RF signal ports using a ground-signal transition for high isolation in a phased antenna array system and related methods

In certain exemplary embodiments, register banks are used to allow for fast beam switching (FBS) in a phased array system. Specifically, each beam forming channel is associated with a register bank containing M register sets for configuring such things as gain/amplitude and phase parameters of the beam forming channel. The register banks for all beam forming channels can be pre-programmed and then fast beam switching circuitry allows all beam forming channels across the array to be switched to use the same register set from its corresponding register bank at substantially the same time, thereby allowing the phased array system to be quickly switched between various beam patterns and orientations. Additionally or alternatively, active power control circuitry may be used to control the amount of electrical power provided to or consumed by one or more individual beam forming channels such as to reduce DC power consumption of the array and/or to selectively change the effective directivity of the array.

Phased array control circuit for controlling the effective shape of a beam-formed signal

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Irvine, CA, United States of America

Vipul Jain