Nvidia Corporation

Microsoft Technology Licensing, LLC

Intel Corporation

Sun Microsystems, Inc.

Microsoft Corporation

Vinod Grover

Michael M Magruder

David L Detlefs

John Joseph Duffy

Goetz Graefe

Sean Jong Lee

Yosseff Levanoni

Michael Murphy

Ali-Reza Adl-Tabatabai

Gad Shlomo Sheaffer

Jan Stephen Gray

Jaydeep Marathe

Mahesh Ravishankar

Bastiaan Joannes Matheus Aarts

Martin Taillefer

Yuan Lin

Dave Detlefs

Bratin Saha

Lingli Zhang

David Read Tarditi, Jr

Charles L Mitchell

Xiangyun Kong

Julian Burger

Akella V S Sastry

Timothy Lawrence Harris

David S Callahan

Benjamin Zorn

Ronny Krashinsky

Boris Beylin

Vadim Bassin

Karthik Pattabiraman

John A Stratton

Yossi Levanoni

Jayant B Kolhe

Andrew Edward Ayers

Thibaut Lutz

Manjunath Kudlur

Michael Lai

Evghenii Gaburov

Hariharan Sandanagobalane

Matt Tolton

Mike Magruder

Douglas Saylor

Jian-Zhong Wang

Jack H Choquette

Stephen Harris Toub

Martin Abadi

Andrew James Edwards

Olivier Giroux

Michael Alan Fetterman

Weirong Zhu

Luke Durant

Gregory Diamos

Alexander Dadiomov

David Mitford Gillies

Peter Michael Nelson

David Erb

Andrew Robert Kerr

Dana D Groff

Vyas Venkataraman

Ajay Sudarshan Tirumala

Mark Ronald Plesko

Weiping Hu

Sukhdeep S Sodhi

Richard Craig Johnson

Bastiaan Aarts

Mark L Roberts

Girish Bharambe

Simon M Meacham

Amit Sabne

Gautam Chakrabarti

Christopher William Dern

Paulius Micikevicius

Adrian Corduneanu

Bin Fan

Venmugil Elango

Kevin James Zatloukal

James Clarkson

Norm Rubin

Alberto Magni

Richard Emil Ladner

Adriana Maria Susnea

Michael Ab Parkes

John Bryan Pormann

Yunsup Lee

Systems and methods for obtaining a set of instructions for executing a computer program and generating executable code for the computer program based, at least in part, on scheduling operations associated with the executable code according to a polyhedral representation of a directed acyclic graph. The set of instructions may be represented as a domain-specific language. The executable code may be executable code for a specific processor architecture.

Accelerating linear algebra kernels for any processor architecture

A computer system manages the allocation of memory to an application program using a dependency tree. The dependency tree informs a memory manager of data inputs, data outputs, and intermediate values associated with execution of the application program. The memory manager allocates a single heap structure within a physical memory. Data associated with each node of the dependency tree is allocated to the heap structure so that data input values are allocated in a contiguous block, and intermediate values are allocated separately. In various examples, as execution of the application program proceeds, the separation of intermediate values from non-intermediate values within the heap reduces memory fragmentation providing improved performance of the computer system as a whole.

Memory management system

Apparatuses, systems, and techniques to perform a neural network. In at least one embodiment, a neural network is performed by at least combining nodes of a graph based, at least in part, on computing resources to perform operations corresponding to the nodes of the graph.

Neural network layer fusion

Apparatuses, systems, and techniques to generate a memory allocation plan for a set of tensors. In at least one embodiment, tensor data corresponding to the set of tensors is stored into memory locations at run time based, at least in part, on the memory allocation plan generated at a compile time.

Techniques for tensor memory allocation

A computation graph is accessed. In the computation graph, operations to be performed are represented as interior nodes, inputs to the operations are represented as leaf nodes, and a result of the operations is represented as a root. Selected sets of the operations are combined to form respective kernels of operations. Code is generated execute the kernels of operations. The code is executed to determine the result.

Execution of computation graphs

System and method of compiling a program having a mixture of host code and device code to enable Profile Guided Optimization (PGO) for device code execution. An exemplary integrated compiler can compile source code programmed to be executed by a host processor (e.g., CPU) and a co-processor (e.g., a GPU) concurrently. The compilation can generate an instrumented executable code which includes: profile instrumentation counters for the device functions; and instructions for the host processor to allocate and initialize device memory for the counters and to retrieve collected profile information from the device memory to generate instrumentation output. The output is fed back to the compiler for compiling the source code a second time to generate optimized executable code for the device functions defined in the source code.

Device profiling in GPU accelerators by using host-device coordination

A system and method for optimizing multiple invocations of a graphics processing unit (GPU) program in Java. In one embodiment, the system includes: (1) a frontend component in a computer system and configured to compile Java bytecode associated with the a class object that implements a functional interface into Intermediate Representation (IR) code and store the IR code with the associated jogArray and (2) a collector/composer component in the computer system, associated with the frontend and configured to traverse a tree containing the multiple invocations from the result to collect the IR code and compose the IR code collected in the traversing into aggregate IR code when a result of the GPU program is explicitly requested to be transferred to a host.

Optimizing multiple invocations of graphics processing unit programs in Java

A system and method for processing source code for compilation. The method includes accessing a portion of host source code and determining whether the portion of the host source code comprises a device lambda expression. The method further includes in response to the portion of host code comprising the device lambda expression, determining a unique placeholder type instantiation based on the device lambda expression and modifying the device lambda expression based on the unique placeholder type instantiation to produce modified host source code. The method further includes sending the modified host source code to a host compiler.

System and method for compiler support for compile time customization of code

Compiler techniques for inline parallelism and re-targetable parallel runtime execution of logic iterators enables selection thereof from the source code or dynamically during the object code execution.

Dynamic compiler parallelism techniques

A compiler and a method of compiling code that reduces memory bandwidth when processing code on a computer are provided herein. In one embodiment, the method includes: (1) automatically identifying a sequence of operations for fusing, wherein the sequence of operations correspond to instructions from a source code, (2) determining subdivisions of a final output of the sequence of operations, (3) determining input data and intermediate operations needed to obtain a final subdivision output for each of the subdivisions and (4) automatically generating code to fuse the sequence of operations employing the subdivisions, wherein the automatically identifying and the automatically generating are performed by a processor.

Fusing a sequence of operations through subdividing

A method, system, and computer program product for executing divergent threads using a convergence barrier are disclosed. A first instruction in a program is executed by a plurality of threads, where the first instruction, when executed by a particular thread, indicates to a scheduler unit that the thread participates in a convergence barrier. A first path through the program is executed by a first divergent portion of the participating threads and a second path through the program is executed by a second divergent portion of the participating threads. The first divergent portion of the participating threads executes a second instruction in the program and transitions to a blocked state at the convergence barrier. The scheduler unit determines that all of the participating threads are synchronized at the convergence barrier and the convergence barrier is cleared.

Execution of divergent threads using a convergence barrier

A system and method for compiling source code (e.g., with a compiler). The method includes accessing a portion of device source code and determining whether the portion of the device source code comprises a piece of work to be launched on a device from the device. The method further includes determining a plurality of application programming interface (API) calls based on the piece of work to be launched on the device and generating compiled code based on the plurality of API calls. The compiled code comprises a first portion operable to execute on a central processing unit (CPU) and a second portion operable to execute on the device (e.g., GPU).

System and method for compiler support for kernel launches in device code

A solution is proposed for implementing staging in computer programs and code specialization at runtime. Even when values are not known at compile time, many of the values used as parameters for a code section or a function are constant, and are known prior to starting the computation of the algorithm. Embodiments of the claimed subject matter propagate these values just before execution in the same way a compiler would if they were compile time constant, resulting in improved control flow and significant simplification in the computation involved.

Partial program specialization at runtime

A system for and method of retrieving values of captured local variables for a lambda function in Java. In one embodiment, the system includes: (1) a Java virtual machine and (2) a captured variable retriever that interacts with the Java virtual machine and configured to retrieve a signature of the lambda function from a classfile of a Java class containing the lambda function, compare the signature with a declaration of the lambda function to identify arguments corresponding to the captured local variables, modify the lambda function and cause the Java virtual machine to execute the modified lambda function.

System and method for retrieving values of captured local variables for lambda functions in Java

Growing community of inventors

Mercer Island, WA, United States of America

Vinod Grover