Enthone Incorporated

Macdermid Enthone Gmbh

Enthone-omi, Inc.

Other

Vincent Paneccasio, Jr

Richard W Hurtubise

Xuan Lin

Qingyun Chen

Thomas B Richardson

Kyle M Whitten

John Commander

Paul Figura

Charles Valverde

Joseph Anthony Abys

Christian Witt

Shaopeng Sun

Daniel Stritch

Nicolai Petrov

Eric Yakobson

Cai Wang

Wenbo Shao

Jianwen Han

Chen Wang

Elie H Najjar

Eric Rouya

Yun Zhang

Theodore Antonellis

Elena H Too

Kshama Jirage

Paul R Gerst

Juan B Haydu

Patricia A Cacciatore

John H Commander

Mark P Chasse&prime;

Sean Xuan Lin

Mark P Chasse

A nickel electrodeposition composition for via fill or barrier nickel interconnect fabrication comprising: (a) a source of nickel ions; (b) one or more polarizing additives; and (c) one or more depolarizing additives. The nickel electrodeposition composition may include various additives, including suitable acids, surfactants, buffers, and/or stress modifiers to produce bottom-up filling of vias and trenches.

Composition and method for fabrication of nickel interconnects

An electrodeposition composition comprising: (a) a source of copper ions; (b) an acid; (c) a suppressor; and (d) a leveler, wherein the leveler comprises a quaternized dipyridyl compound prepared by reacting a dipyridyl compound with a difunctional alkylating agent or a quaternized poly(epihalohydrin). The electrodeposition composition can be used in a process for forming a copper feature over a semiconductor substrate in wafer level packaging to electrodeposit a copper bump or pillar on an underbump structure of a semiconductor assembly.

Copper deposition in wafer level packaging of integrated circuits

Processes and compositions for electroplating a cobalt deposit onto a semiconductor base structure comprising sub-micron-sized electrical interconnect features. In the process, a metalizing substrate within the interconnect features is contacted with an electrodeposition composition comprising a source of cobalt ions, an accelerator comprising an organic sulfur compound, an acetylenic suppressor, a buffering agent and water. Electrical current is supplied to the electrolytic composition to deposit cobalt onto the base structure and fill the submicron-sized features with cobalt. The process is effective for superfilling the interconnect features.

Cobalt filling of interconnects in microelectronics

An electrolytic plating method and composition for electrolytically plating Cu onto a semiconductor integrated circuit substrate having submicron-sized interconnect features. The composition comprises a source of Cu ions and a suppressor compound comprising polyether groups. The method involves superfilling by rapid bottom-up deposition at a superfill speed by which Cu deposition in a vertical direction from the bottoms of the features to the top openings of the features is substantially greater than Cu deposition on the side walls.

Copper electrodeposition in microelectronics

Compositions and methods of using such compositions for electroplating cobalt onto semiconductor base structures comprising submicron-sized electrical interconnect features are provided herein. The interconnect features are metallized by contacting the semiconductor base structure with an electrolytic composition comprising a source of cobalt ions, a suppressor, a buffer, and one or more of a depolarizing compound and a uniformity enhancer. Electrical current is supplied to the electrolytic composition to deposit cobalt onto the base structure and fill the submicron-sized features with cobalt. The method presented herein is useful for superfilling interconnect features.

Cobalt filling of interconnects

An electrodeposition composition comprising: (a) a source of copper ions; (b) an acid; (c) a suppressor, and (d) a leveler, wherein the leveler comprises a quaternized dipyridyl compound prepared by reacting a dipyridyl compound with a difunctional alkylating agent or a quaternized poly(epihalohydrin). The electrodeposition composition can be used in a process for forming a copper feature over a semiconductor substrate in wafer level packaging to electrodeposit a copper bump or pillar on an underbump structure of a semiconductor assembly.

Processes and compositions for electroplating a cobalt deposit onto a semiconductor base structure comprising submicron-sized electrical interconnect features. In the process, a metalizing substrate within the interconnect features is contacted with an electrodeposition composition comprising a source of cobalt ions, an accelerator comprising an organic sulfur compound, an acetylenic suppressor, a buffering agent and water. Electrical current is supplied to the electrolytic composition to deposit cobalt onto the base structure and fill the submicron-sized features with cobalt. The process is effective for superfilling the interconnect features.

A process for metalizing a through silicon via feature in a semiconductor integrated circuit device, the process including, during the filling cycle, reversing the polarity of circuit for an interval to generate an anodic potential at said metalizing substrate and desorb leveler from the copper surface within the via, followed by resuming copper deposition by re-establishing the surface of the copper within the via as the cathode in the circuit, thereby yielding a copper filled via feature.

Process for filling vias in the microelectronics

A composition for electrolytic plating in microelectronics which contains a leveler that comprises the reaction product of an aliphatic di(t-amine) with an alkylating agent. Electrolytic plating methods employing the leveler, a method for making the leveler, and the leveler compound.

Levelers for copper deposition in microelectronics

A method for metallizing a through silicon via feature in a semiconductor integrated circuit device substrate. The method comprises immersing the semiconductor integrated circuit device substrate into an electrolytic copper deposition composition, wherein the through silicon via feature has an entry dimension between 1 micrometers and 100 micrometers, a depth dimension between 20 micrometers and 750 micrometers, and an aspect ratio greater than about 2:1; and supplying electrical current to the electrolytic deposition composition to deposit copper metal onto the bottom and sidewall for bottom-up filling to thereby yield a copper filled via feature. The deposition composition comprises (a) a source of copper ions; (b) an acid selected from among an inorganic acid, organic sulfonic acid, and mixtures thereof; (c) an organic disulfide compound; (d) a compound selected from the group consisting of a reaction product of benzyl chloride and hydroxyethyl polyethyleneimine, a quaternized dipyridyl compound, and a combination thereof; and (d) chloride ions.

Copper filling of through silicon vias

A method and composition for metallizing a via feature in a semiconductor integrated circuit device substrate, using a leveler compound which is a dipyridyl compound.

Method and composition for electrodeposition of copper in microelectronics with dipyridyl-based levelers

A method and composition for electroplating Cu onto a substrate in the manufacture of a microelectronic device involving and electrolytic solution containing a source of Cu ions and a quaternized pyridinium salt compound for leveling.

A method for electroplating a copper deposit onto a semiconductor integrated circuit device substrate having submicron-sized features, and a concentrate for forming a corresponding electroplating bath. A substrate is immersed into an electroplating bath formed from the concentrate including ionic copper and an effective amount of a defect reducing agent, and electroplating the copper deposit from the bath onto the substrate to fill the submicron-sized reliefs. The occurrence of protrusion defects from superfilling, surface roughness, and voiding due to uneven growth are reduced, and macro-scale planarity across the wafer is improved.

Growing community of inventors

Madison, CT, United States of America

Vincent Paneccasio, Jr