Hewlett Packard Enterprise Development LP

Hewlett-packard Development Company, L.p.

Other

Compaq Information Technologies Group, L.p.

Vincent Hung Nguyen

Robert Van Cleve

Kevin G Depew

David W Engler

Chanh V Hua

Theodore F Emerson

David F Heinrich

Minh H Nguyen

Kuan-WeI Chen

Trang Lan Do

John Norton

E David Neufeld

Raghavan V Venugopal

Reza Mushtag Bacchus

Scott P Faasse

Jeoff M Krontz

Thierry Fevrier

John D Nguyen

Binh Nguyen

Ku-Hsu Nien

Ning Ge

Kevin B Leigh

Joseph Foster

Earl W Moore

Naveen Muralimanohar

Melvin K Benedict

Darren John Cepulis

Gary W Thome

Andrew Brown

William C Hallowell

Stephen Spencer

Arthur G Volkmann

Ho M Lai

Michael T Gill

Jeffrey A Plank

Jui Lin Chen

David W Vice

Robert E Van Cleve

Pranay Mahendra

Sung Hsia Kuo

Peter J Michels

Hsueh Yu Chao

Vi T Lu

Randolph O Dow

Owais Kidwai

Steve Clohset

Hung Quoc Phu

A cable system includes a printed circuit board (PCB) comprising a set of connector pin pads and a card-side connector, with the card-side connector comprising a housing attached to the PCB and a set of pins. A first subset of the set of pins is soldered on and electrically coupled to the connector pin pads. The cable system includes first and second cables electrically coupled to the card-side connector. The first cable includes a first end soldered onto the connector pin pads to couple to the first subset of the pins and a second end coupled to a first host-side connector. The second cable includes a first end soldered onto a second subset of the set of pins of the card-side connector and a second end coupled to a second host-side connector, thereby facilitating electrical coupling between the card-side connector and the first and second host-side connectors.

Optimized cable solution

Methods and apparatus can be used to turn an existing 240 VAC or 480 VAC/600 VAC outlet into two or more time-sharing, i.e., one operating at a time, outlets. An AC switch box with two time-sharing outlets can be made with either a mechanical switch for switching which load receives power, or automatically, by a microcomputer system, for example. In the automatic AC switch box, the non-favored outlet may be typically powered on unless a load is detected at the favored/default outlet, when power to the non-favored outlet is automatically disconnected until the load is reduced or eliminated.

Alternating current time-sharing outlets and switch box

A modular riser card, an electronic device having a modular riser card, and a method of determining a type of modular riser card pin connection are disclosed. The modular riser card includes a circuit board and a removable connector assembly. The circuit board includes a first receptacle having a plurality of first pins. The removable connector assembly includes a connector body defining a second receptacle having a plurality of second pins, and an opening formed in the connector body adjacent to the second receptacle. The connector body is mounted on the circuit board such that the first receptacle protrudes through the opening and is aligned with the second receptacle. The first and second receptacles form a riser card connector that is configured to removably receive an expansion card of an electronic device.

Modular riser card for an electronic device

One aspect of the instant application describes a system that includes a plurality of stacked mezzanine boards communicatively coupled to a motherboard and a metal enclosure enclosing the motherboard and mezzanine boards. A respective mezzanine board can include a number of solder pads, and the metal enclosure can include a plurality of metal strips, a respective metal strip to make contact with a solder pad of a corresponding mezzanine board. The system can further include a logic module positioned on the respective mezzanine board to determine a location of the respective mezzanine board based on a contact pattern between the metal strips and solder pads of the respective mezzanine board.

Intelligent cable topology detection

A method of adjusting core and un-core operating frequencies of two or more processors of a server includes determining core and un-core operating frequency variations versus power consumption limit variations of the two or more processors. The method also includes determining two or more first power consumption levels associated with the two or more processors. Each one of the two or more processors run at essentially a same target core operating frequency and at a same target un-core operating frequency at the respective first power consumption level of the processor. The method further includes adjusting the core and un-core operating frequencies of the two or more processors by setting a power consumption limit of each one of the two or more processors at the respective first power consumption level of the processor.

Adjusting power consumption limits for processors of a server

A module, comprising: a printed circuit board (PCB); a power and management connector disposed on the PCB to connect to a computing device via a first cable; a data connector disposed on the PCB to connect to the computing device via a second cable; and a memory slot, to accept a memory device, disposed on the PCB and connected to the power and management connector and the data connector.

Cabled module for adding memory devices to a system

A technique includes receiving, by a cluster management controller, data representing results of a plurality of performance tests that are conducted on a plurality of processors that are associated with the plurality of computing nodes of a cluster. The technique includes, based on the data representing the results, selecting a lead processor of the plurality of processors; and communicating, by the cluster management controller, with the plurality of computing nodes to regulate core and un-core operating frequencies of the plurality of processors. Communicating with the plurality of computer nodes includes communicating data representing a core operating frequency of the lead processor and an un-core operating frequency of the lead processor.

Regulating core and un-core processor frequencies of computing node clusters

One or more stacking cabled I/O slots may be installed in a stacked arrangement on a computing device, such as in an I/O expansion socket of a computing device motherboard. Slot detection and population logic associated with each of the one or more stacking cabled I/O slots enables signaling from each installed stacking cabled I/O slot, in order for its presence and location relative to any other installed stacking cabled I/O slot to be identified to and recognized by the computing device. High speed data signals through an installed stacking cabled I/O slot are coupled to the computing device via a cable, while power and logic signals are exchanged between the computing device and the one or more stacking cabled I/O slots via connections to the I/O expansion socket.

Stacking cabled input/output slots

An example device in accordance with an aspect of the present disclosure includes a plurality of memory segments corresponding to at least one memory channel of a computing system that is to receive a memory module. A performance attribute of an Advanced Configuration and Power Interface (ACPI) table is set to indicate performance of at least one of the plurality of memory segments, and is usable for memory allocation by an operating system memory manager.

Performance attributes for memory

Examples herein relate to an adjustment of a power limit of a processor. Examples disclose setting the power limit of the processor. The examples also obtaining a temperature difference between a die temperature of a core within the processor and a throttle temperature. In response to a determination that the temperature difference is at most equal to a temperature activation point, adjusting the power limit of the processor so that the adjust power limit is less than the set power limit.

Adjusting a power limit in response to a temperature difference

A method may include assigning a core identifier of an active core to an idle core. After synchronizing the active core and idle core, the active core is inactivated.

Assignment of core identifier

Example implementations relate to a self-tune controller. For example, the self-tune controller may poll, via an out-of-band data stream, low-level operation information about a processor or a bus of a computing system under a present workload. At least some of the low-level operation information may be descriptive of a nature of traffic on the bus. The self-tune controller may program, via an out-of-band control signal, a setting of the computing system for the present workload based on the low-level operation information.

Self-tune controller

An example method includes linking a transmit line and receive line to a respective via, and printing two paths to each via, wherein each path is interrupted by two pairs of contacts. When a first resistor is in a first pair of contacts at a receive via, first signal is formed between a receive point of a first connector and the receive line. When a first capacitor is in first pair of contacts at a transmit via, second signal is formed between transmit point of first connector and the transmit line. When a second resistor is in second pair of contacts at receive via, third signal is formed between receive point of a second connector and the receive line. When a second capacitor is in second pair of contacts at transmit via, fourth signal is formed between a transmit point of second connector and the transmit line.

Printed circuit boards

Growing community of inventors

Anaheim, CA, United States of America

Vincent Hung Nguyen