United States of America As Represented by the Administrator of Nasa

Vilem Mikula

Ari D Brown

Kevin L Denis

Timothy M Miller

Joseph Oxborrow

The disclosed subject matter relates to techniques, laminates and devices used to fabricate thin dielectric or semiconductor membranes including a handling substrate including a photoresist material on a first surface thereof, a semiconductor wafer having a circuit pattern on a first surface and a second surface to be processed and a temporary adhesive layer temporarily bonding the first surface of the semiconductor wafer to the first surface of the handling substrate including the photoresist material.

Wafer-scale membrane release laminates, devices and processes

A metallic etching process includes applying an anti-reflection coating over a metallic superstrate, applying a dry film photoresist over the anti-reflection coating, removing exposed portions of the dry film photoresist exposing a portion of the anti-reflection coating, etching the exposed portions of the anti-reflection coating exposing portions of the metal superstrate, etching portions of the metallic superstrate not covered by the dry film photoresist, and removing the dry film photoresist and the anti-reflection coating leaving portions of the metallic superstrate. An indium bump liftoff process includes applying a positive photoresist, forming a liftoff mask by applying a dry film photoresist over the positive photoresist, removing exposed portions of the liftoff mask to expose a portion of a substrate, depositing an indium film over the exposed portion of the substrate and remaining portions of the liftoff mask, and removing remaining portions of the liftoff mask.

Indium bump liftoff process on micro-machined silicon substrates

A method of fabricating circuitry in a wafer includes depositing a superconducting metal on a silicon on insulator wafer having a handle wafer, coating the wafer with a sacrificial layer and bonding the wafer to a thermally oxide silicon wafer with a first epoxy. The method includes flipping the wafer, thinning the flipped wafer by removing a handle wafer, etching a buried oxide layer, depositing a superconducting layer, bonding the wafer to a thermally oxidized silicon wafer having a handle wafer using an epoxy, flipping the wafer again, thinning the flipped wafer, etching a buried oxide layer from the wafer and etching the sacrificial layer from the wafer. The result is a wafer having superconductive circuitry on both sides of an ultra-thin silicon layer.

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Washington, DC, United States of America

Vilem Mikula