Intel Corporation

Viktor D Vogman

Brian J Griffith

Justin J Song

Bill W Carter

Krishnakanth Venkata Sistla

Stephen H Gunther

Avinash N Ananthakrishnan

Ankush Varma

Jeremy J Shrall

Vivek Garg

Eric J DeHaemer

Harold L Massie

Martin Rowland

Chris Poirier

Gopal R Mundada

Joseph R Doucette

Xiuting (Kaleen) Man

Richard Kaltenbach

A server system includes a common power bus, a power supply to provide direct current (DC) power through the common power bus, at least one node including a processor to receive the DC power through the common power bus, a transmitter capacitive coupled to the common power bus to transmit a power information signal from the power supply through the common power bus, and at least one receiver capacitive coupled to the common power bus to receive the power information signal transmitted by the transmitter and to provide the received power information signal to the at least one node. A plurality of buffers respectively coupled between the common power bus and each of the power supply and the at least one node provide path separation for high frequency and low frequency currents.

Methods and systems for server power line communication

Voltage regulation techniques for electronic devices are described. In one embodiment, for example, an apparatus may comprise an electronic element comprising one or more integrated circuits, a voltage regulator to regulate an input voltage of the electronic element, the voltage regulator to source an output current comprising at least a portion of an input current of the electronic element, the voltage regulator to operate in a current-limiting mode to limit the output current when the input current exceeds a threshold current, and a capacitor bank comprising one or more capacitors, the capacitor bank to source a supplemental current to supplement the output current of the voltage regulator when the voltage regulator operates in the current-limiting mode. Other embodiments are described and claimed.

Voltage regulation techniques for electronic devices

A power supply system includes at least one power supply module and at least one redundant power supply module. A power supply module may include a charging resistor in parallel with an OR-ing device to keep all filter capacitors charged as long as at least one power supply module remains operational. This may avoid current spikes at turn on and may enable the redundant module to turn on without using soft start.

Power management system

A power supply system includes at least a first power supply module and at least one redundant power supply module. The at least one power supply module supplies power to an output terminal. The at least one redundant power supply module operates in a first state and in a second state. In the first state the second power supply module supplies power to the output terminal. In the second state the second power supply module provides standby power and operates in a burst mode (for example, such as a discontinuous conduction mode).

Reducing power losses in a redundant power supply system

Methods and platforms may include a common bus, and a set of redundant power supply modules coupled to the common bus. Each power supply module can have a conversion circuit, an AC fault detector coupled to the conversion circuit, and a DC fault detector coupled to the conversion circuit. The platform may also include a system coupled to the common bus.

Redundant server system with an optimized failover arrangement

A power detection circuit includes a sense element to convey current from a source to a load, a compensating reference element located proximate to the sense element, a comparator, and a precision current sink. The comparator includes a first input coupled to the sense element, a second input coupled to the compensating reference element, and an output. The comparator is configured to assert a signal on the output in response detecting that a first voltage on the first input equals a second voltage on the second input. The precision current sink is coupled to the second input of the comparator and is configured to pull constant current through the compensating reference element based on a predetermined power threshold.

Method and apparatus for precision CPU maximum power detection

Example embodiments of a processor current monitor include a switching voltage regulator including a series-connected LC filter including a first inductor, with the first inductor having an inductance value of L1, a first terminal coupled to a switch and a second terminal coupled to a first node, and with the LC filter further including a first capacitor, with the first capacitor having a capacitance value of C1, a first terminal coupled to the first node and a second terminal coupled to a second node, where the switch is configured to couple the inductor to an input voltage at a selected frequency and with the switching voltage regulator configured to supply an output current from the first node to a processor, an inductor current monitoring element, coupled to the first inductor, configured to output a first signal indicating the magnitude of current flowing through the first inductor, a capacitor current monitoring element, coupled to the first capacitor, configured to output a second signal indicating the magnitude of current flowing through the first capacitor, and a summing element, coupled to receive the first and second signals, configured to output a current monitor signal indicating the sum of the first and second signals and with the current monitor signal indicating the magnitude of the output current.

Method and apparatus for precision CPU monitoring

In an embodiment, a processor includes a plurality of cores each to independently execute instructions, a plurality of graphics engines each to independently perform graphics operations; and, a power control unit coupled to the plurality of cores to control power consumption of the processor, where the power control unit includes a power excursion control logic to limit a power consumption level of the processor from being above a defined power limit for more than a duty cycle portion of an operating period. Other embodiments are described and claimed.

Enforcing a power consumption duty cycle in a processor

Methods and systems may involve detecting an output voltage of a voltage regulator and sensing an inductor current corresponding to a saturating output inductor of the voltage regulator. A switching frequency signal can be generated based on the inductor current, wherein the voltage regulator may be controlled based on the output voltage and the switching frequency signal. In one example, the switching frequency signal sets a first switching frequency if the inductor current is below a saturation current threshold, and sets a second switching frequency if the inductor current is above the saturation current threshold, wherein the second switching frequency is less than the first switching frequency.

Growing community of inventors

Olympia, WA, United States of America

Viktor D Vogman