General Electric Company

Martin Marietta Corporation

Vikram Bidare Krishnamurthy

Richard J Saia

Kevin Matthew Durocher

Herbert S Cole

Ernest Wayne Balch

Ronald Frank Kolc

William P Kornrumpf

Dale M Brown

Mario Ghezzo

Gerald J Michon

Eric J Wildi

James William Kretchmer

Kyung W Paik

John Anderson Fergus Ross

Nikhil R Taskar

Nick Andrew Van Stalen

A technique for fabricating a resistor on a flexible substrate. Specifically, at least a portion of a polyimide substrate is activated by exposure to a ion sputter etch techniques. A metal layer is disposed over the activated portion of the substrate, thereby resulting in the formation of a highly resistive metal-carbide region. Interconnect layers are disposed over the metal-carbide region and patterned to form terminals at opposite ends of the metal carbide region. The metal-carbide region is patterned to form a resistor between the terminals. Alternatively, only a selected area of the polyimide substrate is activated. The selected area forms the area in which the metal-carbide region is formed. Interconnect layers are disposed over the metal-carbide region and patterned to form terminals at opposite ends of the metal-carbide region.

Techniques for fabricating a resistor on a flexible base material

A light emitting device containing an array of directional emission LEDs is provided. The directional emission LEDs of the array may be substrate emitting, lateral current injection, resonant cavity LEDs mounted in a flip-chip configuration. Each LED may emit a different color of light, such that the output of the array appears white to an observer. The LED array package may contain microoptical elements, such as a diffraction grating or microprisms, integrated into the light emitting surface of the package. The microoptical elements are used to mix the light beams emitted by individual LEDs in the array.

Solid state lighting device with reduced form factor including LED with directional emission and package with microoptics

A time-domain communication system in an ultrasonic imaging system includes an ultrasonic probe having an ultrasonic array with ultrasonic array outputs and a time-domain multiplexer with an input connected to each of the ultrasonic array outputs and also having a multiplexer output. The time-domain multiplexer continually cycles through each of the ultrasonic array outputs at a predetermined frequency connecting each of the ultrasonic array outputs to the multiplexer output for a predetermined amount of time. An ultrasonic data processing unit is provided and includes a de-multiplexer connected to the multiplexer output. The de-multiplexer has de-multiplexer outputs and continually cycles through each of the de-multiplexer outputs at the predetermined frequency connecting each of the de-multiplexer outputs to the multiplexer output for the predetermined amount of time. A timing reference is connected to the time-domain multiplexer and the de-multiplexer for providing a single timing reference to determine at least the predetermined frequency.

System and method for time-domain multiplexed communication in ultrasound applications

There is provided a flexible circuit module, including at least one rigid carrier, at least one solid state device mounted over a first side of the at least one rigid carrier, a flexible base supporting a second side of the at least one rigid carrier, a conductive interconnect pattern on the flexible base, and a plurality of feed through electrodes extending from the first side to the second side of the at least one rigid carrier and electrically connecting the conductive interconnect pattern with the at least one of a plurality of the solid state devices. The solid state devices may be LED chips to form an LED array module.

Plastic packaging of LED arrays

A depletion mode MOSFET and resistor are fabricated as a silicon carbide (SiC) integrated circuit (IC). The SiC IC includes a first SiC layer doped to a first conductivity type and a second SiC layer overlaid on the first SiC layer and doped to a second conductivity type. The second SiC layer includes at least four more heavily doped regions of the second conductivity type, with two of such regions comprising MOSFET source and drain electrodes and two other of such regions comprising resistor electrodes. The second SiC layer includes an isolation trench between the MOSFET electrodes and the resistor electrodes. At least two electrically conductive contacts are provided as MOSFET electrode contacts, each being positioned over at least a portion of a respective MOSFET electrode and two other electrically conductive contacts are provided as resistor electrode contacts, each being positioned over at least a portion of a respective resistor electrode. An oxide layer extends over the second SiC layer with at least a portion of the oxide layer positioned between the MOSFET electrode contacts. A MOSFET gate electrode is positioned over the oxide layer, and coupling means are provided for electrically coupling one of the source, drain, and gate electrodes to one of the resistor electrodes.

Silicon carbide integrated circuits

A magnetic circulator is incorporated into a multi-chip module using a microwave high density interconnect (HDI) structure. A prepackaged circulator can be inserted into a ready-made high density interconnected multi-chip module; this prepackaged circulator may use a stripline design having a signal line with two ground planes above and below the signal line, or a microstrip transmission line design having one signal line and one ground plane below the signal line. Alternatively a circulator can be manufactured directly in a high density interconnected multi-chip module, with a stripline, or a microstrip transmission line design.

Fabrication of compact magnetic circulator components in microwave

A depletion mode MOSFET and resistor are fabricated as a silicon carbide (SiC) integrated circuit (IC). The SiC IC includes a first SiC layer doped to a first conductivity type and a second SiC layer overlaid on the first SiC layer and doped to a second conductivity type. The second SiC layer includes at least four more heavily doped regions of the second conductivity type, with two of such regions comprising MOSFET source and drain electrodes and two other of such regions comprising resistor electrodes. The second SiC layer includes an isolation trench between the MOSFET electrodes and the resistor electrodes. At least two electrically conductive contacts are provided as MOSFET electrode contacts, each being positioned over at least a portion of a respective MOSFET electrode and two other electrically conductive contacts are provided as resistor electrode contacts, each being positioned over at least a portion of a respective resistor electrode. An oxide layer extends over the second SiC layer with at least a portion of the oxide layer positioned between the MOSFET electrode contacts. A MOSFET gate electrode is positioned over the oxide layer, and coupling means are provided for electrically couping one of the source, drain, and gate electrodes to one of the resistor electrodes.

Growing community of inventors

Clifton Park, NY, United States of America

Vikram Bidare Krishnamurthy