Samsung Electronics Co., Ltd.

Vikas Sinha

Gunneswara Rao Marripudi

Fred Worley

Harry Rogers

Zhan Ping

Hien Le

Tarun Nakra

Sompong Paul Olarig

Ramdas P Kachare

Changho Choi

Stephen Garry Fischer

Nima Elyasi

Zvi Guz

Qinling Zheng

Hubbert Smith

Yingying Tian

Jianjian Huo

Ming Lin

Indira Joshi

Eric C Quinnell

Apurva Patel

Matthew Derrick Garrett

Junhee Yoo

Ajit Yagaty

Teik Tan

Zvika Guz

Jyotsna Kartha

Robert Bell

Omar Torres

A system and method for distributed caching, the system having at least one network-connected storage device, a content server, and a control server. The control server is configured to discover the at least one network-connected storage device, collect device information from the at least one network-connected storage device, where the device information comprises a device location, assign each of the at least one network-connected storage device to a device domain based on each device location, and provide the content server with the device information for the one or more network-connected storage.

System and method for distributed caching

A method for predicting a time-to-failure of a target storage device may include training a machine learning scheme with a time-series dataset, and applying the telemetry data from the target storage device to the machine learning scheme which may output a time-window based time-to-failure prediction. A method for training a machine learning scheme for predicting a time-to-failure of a storage device may include applying a data quality improvement framework to a time-series dataset of operational and failure data from multiple storage devices, and training the scheme with the pre-processed dataset. A method for training a machine learning scheme for predicting a time-to-failure of a storage device may include training the scheme with a first portion of a time-series dataset of operational and failure data from multiple storage devices, testing the machine learning scheme with a second portion of the time-series dataset, and evaluating the machine learning scheme.

Systems and methods for predicting storage device failure using machine learning

A system and method for leveraging a native operating system page cache when using non-block system storage devices is disclosed. A computer may include a processor, memory, and a non-block system storage device. A file system may be stored in memory and running on the processor, which may include a page cache. A key-value file system (KVFS) may reside between the file system and the storage device and may map received file system commands to key-value system commands that may be executed by the storage device. Results of the key-value system commands may be returned to the file system, permitting the operating system to cache data in the page cache.

System and methods for providing fast cacheable access to a key-value device through a filesystem interface

Embodiments of the inventive concept include solid state drive (SSD) multi-card adapters that can include multiple solid state drive cards, which can be incorporated into existing enterprise servers without major architectural changes, thereby enabling the server industry ecosystem to easily integrate evolving solid state drive technologies into servers. The SSD multi-card adapters can include an interface section between various solid state drive cards and drive connector types. The interface section can perform protocol translation, packet switching and routing, data encryption, data compression, management information aggregation, virtualization, and other functions.

Solid state drive multi-card adapter with integrated processing

In a method for training a machine learning model, the method includes: segmenting, by a processor, a dataset from a database into one or more datasets based on time period windows; assigning, by the processor, one or more weighted values to the one or more datasets according to the time period windows of the one or more datasets; generating, by the processor, a training dataset from the one or more datasets according to the one or more weighted values; and training, by the processor, the machine learning model using the training dataset.

Data management, reduction and sampling schemes for storage device failure

A system and a method to allocate data to a first cache increments a first counter if a reuse indicator for the data indicates that the data is likely to be reused and decremented the counter if the reuse indicator for the data indicates that the data is likely not to be reused. A second counter is incremented upon eviction of the data from the second cache, which is a higher level cache than the first cache. The data is allocated to the first cache if the value of the first counter is equal to or greater than the first predetermined threshold or the value of the second counter equals zero, and the data is bypassed from the first cache if the value of the first counter is less than the first predetermined threshold and the value of the second counter is not equal to zero.

Bypass predictor for an exclusive last-level cache

A distributed storage system node is disclosed. The distributed storage system node may include at least one storage device, which may act as the primary replica for data subject to an Input/Output (I/O) request. A cost analyzer may calculate a local estimated time required to complete the I/O request at the primary replica, and a remote estimated time required to complete the I/O request at a secondary replica of the data. An I/O redirector may direct the I/O request to either the primary replica or the secondary replica based on the local estimated time required and the one remote estimated time required.

IO redirection methods with cost estimation

A system and method for leveraging a native operating system () page cache () when using non-block system storage devices () is disclosed. A computer () may include a processor (), memory (), and a non-block system storage device (). A file system () may be stored in memory () and running on the processor (), which may include a page cache (). A key-value file system (KVFS) () may reside between the file system () and the storage device () and may map received file system commands () to key-value system commands () that may be executed by the storage device (). Results of the key-value system commands () may be returned to the file system (), permitting the operating system () to cache data in the page cache ().

A system and method for providing erasure code data protection for an array of solid state drives. The solid state drives are connected to an Ethernet switch which includes a RAID control circuit, or a state machine, to process read or write commands that may be received from a remote host. The RAID control circuit, if present, uses a low-latency cache to execute write commands, and the state machine, if present, uses a local central processing unit, which in turn uses a memory as a low-latency cache, to similar effect.

Erasure code data protection across multiple NVMe over fabrics storage devices

A system and a method provide a memory-access technique that effectively parallelizes DRAM operations and coherency operations to reduce memory-access latency. The system may include a memory controller, an interconnect and a processor. The interconnect may be coupled to the memory controller. The processor may be coupled to the memory controller through a first path and a second path in which the first path is through the interconnect and the second path bypasses the interconnect. The processor may be configured to send substantially concurrently a memory access request to the memory controller via the first path and send a page activation request or a hint request to the memory controller via the second path so that the DRAM access operations appear to be masked, or hidden by the coherency operations.

System and method for early DRAM page-activation

According to one general aspect, an apparatus may include a processor configured to issue a first request for a piece of data from a cache memory and a second request for the piece of data from a system memory. The apparatus may include the cache memory configured to temporarily store a subset of data. The apparatus may include a memory interconnect. The a memory interconnect may be configured to receive the second request for the piece of data from the system memory. The a memory interconnect may be configured to determine if the piece of memory is stored in the cache memory. The a memory interconnect may be configured to, if the piece of memory is determined to be stored in the cache memory, cancel the second request for the piece of data from the system memory.

Growing community of inventors

Sunnyvale, CA, United States of America

Vikas Sinha