Verisilicon Holdings Company Ltd.

Verisilicon Microelectronics (shanghai) Co., Ltd.

Vijayanand Angarai

Asheesh Kashyap

Seshagiri Prasad Kalluri

Tracy Nguyen

Adam Christopher Krolnik

Venkata Krishna Vemireddy

Michelle Y Che

A data collection system includes one or more input sensing devices and a data collection device. The data collection device includes data collection circuitry that is continuously activated to capture measurement data samples from the one or more input sensing devices and locally store the measurement data samples. The data collection device also includes a digital processor that is coupled to the data collection circuitry and is activated to locally perform a sample analysis of the measurement data samples, wherein the sample analysis is a regular analysis of routine measurement data samples when the measurement data samples are without a triggering event, and wherein the sample analysis is an event analysis when the measurement data samples include a triggering event. A data collection integrated circuit and a measurement data sample collection method are also included.

Low energy system for sensor data collection and measurement data sample collection method

A next program counter (PC) value generator. The next PC value generator includes a discontinuity decoder that is provide to detect a discontinuity instruction among a plurality of instructions and a tight loop decoder that is provide to: a) detect a tight loop instruction, and b) provide a tight loop instruction target address. The next PC value generator further includes a next PC value logic having a plurality of inputs: a first input coupled to an output of the discontinuity decoder, and a second input coupled to an output of the tight loop decoder. The next PC value logic provides as an output, without a stall, a control signal that a next PC value is to be loaded with the tight loop instruction target address if: the discontinuity decoder detects a discontinuity instruction, and the tight loop decoder detects a tight loop instruction.

Instruction fetch pipeline for superscalar digital signal processors and method of operation thereof

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Allen, TX, United States of America

Vijayanand Angarai