Freescale Semiconductor,inc.

Motorola Corporation

Nxp Usa, Inc.

Vijay Sarihan

Lei L Mercado

Scott M Hayes

Young Sir Chung

James Jen-Ho Wang

Edward R Prack

Owen R Fay

Paige M Holm

Zhiwei Gong

Jinbang Tang

Alan J Magnus

Philip H Bowles

George F Carney

Addi B Mistry

Lizabeth Ann Keser

James H Kleffner

Mamur Chowdhury

A device package includes a substrate having an active surface. Electrical connection bumps are deposited on the active surface and are arranged in an array having a perimeter. At least one electronic component is formed at a region of the active surface, where the region is located outside of the perimeter of the array of electrical connection bumps. When the device package is coupled with external circuitry via the electrical connection bumps, the region at which the electronic component is formed is suspended over the electronic circuitry. This region is subject to a lower stress profile than a region of the active surface circumscribed by the perimeter. Thus, stress sensitive electronic components can be located in this lower stress region of the active surface.

Package with low stress region for an electronic component

A solder ball pad for mounting a solder ball of a semiconductor device for preventing delamination of an overlying dielectric layer, and particularly devices and methods providing improved solder ball pad structures in a device such as a semiconductor device package.

Solder pad for semiconductor device package

A method includes applying a compressive force against MEMS structures at a front side of a MEMS wafer using a protective material covering at least a portion of the front side of the MEMS wafer. The method further includes concurrently dicing through the protective material and the MEMS wafer from the front side to produce a plurality of MEMS dies, each of which includes at least one of the MEMS structures. The protective material is secured over the front side of the MEMS wafer to apply pressure to the protective material, and thereby impart the compressive force against the MEMS structures to largely limit movement of the MEMS structures during dicing. A tack-free surface of the protective material enables its removal following dicing.

Method for shielding MEMS structures during front side wafer dicing

The various embodiments described herein provide microelectromechanical systems (MEMS) sensor devices and methods of forming the same. In general, the embodiments provide MEMS sensor devices formed with two semiconductor die that are bonded together. Specifically, a sensor die includes at least one MEMS sensor fabricated thereon, such as MEMS gyroscope or MEMS accelerometer. A control-circuit die includes at least one integrated MEMS control circuit formed on an active area of the die. The control-circuit die is bonded to the sensor die with the active area and the integrated MEMS control circuits on the exterior side. The bonding defines and seals a cavity between the two die that encompasses the MEMS sensor and can be used to seal the MEMS sensor in a vacuum.

Microelectromechanical systems (MEMS) devices with control circuits and methods of fabrication

A method for packaging an integrated circuit comprises the steps of: providing a ground plane, the ground plane having a recessed area shaped to receive an integrated circuit die, wherein the integrated circuit die having a first surface with active circuitry, a second surface, and an edge generally orthogonal to the first and second surfaces; attaching the second surface of the integrated circuit die to a bottom of the recessed area with a thermally conductive adhesive; filling a space between the edge of the integrated circuit die and a side of the recessed area with a fill material; forming an insulating layer on the ground plane and the first surface of the integrated circuit die; patterning the insulating layer to expose contacts on the first surface of the integrated circuit die; and plating electrical conductors on the insulating layer and the contacts.

Package for high power integrated circuits and method for forming

A method of placing a die includes providing an embedded plane. The embedded plane has a openings, grid lines, and protruding portions. Each of the plurality of openings are surrounding by a subset of the plurality of grid lines. At least one of the protruding portions extends into one of the openings. A die is placed into one of the openings and at least one of the protruding portions bends during such placement so that it is in contact with at least a portion of a minor surface of the die.

Method for forming a packaged semiconductor device having a ground plane

A radiation shielded module () and method of shielding microelectronic devices (, and) including a single interconnect substrate () having a first side () and a second side (). At least one microelectronic device is coupled to the first side of the single interconnect substrate. A shielding structure () is coupled to the single interconnect substrate and configured to shield radio frequency interference (RFI) and electromagnetic interference (EMI) that propagate through at least a portion of the single interconnect substrate.

Radiation shielded module and method of shielding microelectronic device

A method for creating an under bump metallization layer () is provided. In accordance with the method, a die () is provided which has a die pad () disposed thereon. A photo-definable polymer (or) is deposited on the die pad, and an aperture () is created in the photo-definable polymer. Finally, an under bump metallization layer () is deposited in the aperture. A die package is also provided comprising a die having a die pad () disposed thereon, and having an under bump metallization layer () disposed on the die pad. The structure has a depression or receptacle () therein and has a thickness of at least about 20 microns.

Under bump metallurgy structural design for high reliability bumped packages

In accordance with one embodiment, a stress buffer () is formed between a power metal structure () and passivation layer (). The stress buffer () reduces the effects of stress imparted upon the passivation layer () by the power metal structure (). In accordance with an alternative embodiment, a power metal structure (A) is partitioned into segments (), whereby electrical continuity is maintained between the segments () by remaining portions of a seed layer () and adhesion/barrier layer (). The individual segments () impart a lower peak stress than a comparably sized continuous power metal structure ().

Semiconductor power device with shear stress compensation

In accordance with one embodiment, a stress buffer ( ) is formed between a power metal structure ( ) and passivation layer ( ). The stress buffer ( ) reduces the effects of stress imparted upon the passivation layer ( ) by the power metal structure ( ). In accordance with an alternative embodiment, a power metal structure ( A) is partitioned into segments ( ), whereby electrical continuity is maintained between the segments ( ) by remaining portions of a seed layer ( ) and adhesion/barrier layer ( ). The individual segments ( ) impart a lower peak stress than a comparably sized continuous power metal structure ( ).

Semiconductor power device and method of formation

An electrical,and a method of making the package is disclosed. Specifically the package,contains a lid,with at least one opening,through the lid,into a cavity,surrounding the die,between the lid,and the substrate,of the package,. Underfill material,is injected through the opening,to at least partially fill the cavity,to prevent both vertical and horizontal die cracking and to provide a more reliable package.

Package for an electronic component and a method of making it

A semiconductor device (10) includes a bump structure that reduces stress and thus reduces passivation cracking and silicon cratering that can be a failure mode in semiconductor manufacturing. The stress is reduced by forming a polyimide layer (16) over a passivation layer (14). The polyimide layer (16) is extended beyond an edge of the passivation layer (14) over the metal pad (12). A solder bump (22) is composed of a eutectic material and is formed on the metal pad (12) and on the polyimide layer (16). The polyimide layer (16) prevents the solder bump (22) from contacting the passivation layer (14). This is useful for electroless or electroplating technology and may also be useful in other types of bump forming technology such as C4 and E3.

Method and apparatus for stress relief in solder bump formation on a

A flow sensor device including a body portion that provides a pressure differential when placed in fluid stream and a pressure sensor portion associated with the body portion to sense the pressure differential. In one embodiment, the body portion (13,72,113) includes a channel (16,76,116) that extends from an entrance side (24,44,124) to an exit side (26, 46). The channel (16, 76,116) has an inner portion (27, 47,87) between the entrance side (24, 44,124) and the exit side (26, 46). The channel (16,76,116) has a first cross-sectional area at the entrance side (24,44,124) and a second cross-sectional area at the inner portion (27,47,87), which is less than the first cross-sectional area. The pressure sensor portion (14,74,114) includes a diaphragm (18,38,78,118) and is associated with the body portion (13,72,113) such that when a fluid passes through the channel (16, 76,116), a pressure differential is sensed by the pressure sensor portion (14,74,114).

Growing community of inventors

Paradise Valley, AZ, United States of America

Vijay Sarihan