International Business Machines Corporation

Vijay P Kesan

Subramanian Srikanteswara Iyer

Ernest Bassous

Jean-Marc Halbout

Rajiv V Joshi

Seshadri Subbanna

John M Aitken

Manu J Tejwani

Michael R Scheuermann

Massimo A Ghioni

Silicon-VLSI-compatible photodetectors, in the form of a metal-semiconductor-metal photodetector (MSM-PD) or a lateral p-i-n photodetector (LPIN-PD), are disclosed embodying interdigitated metallic electrodes on a silicon surface. The electrodes of the MSM-PD have a moderate to high electron and hole barrier height to silicon, for forming the Schottky barriers, and are fabricated so as to be recessed in the surface semiconducting layer of silicon through the use of self-aligned metallization either by selective deposition or by selective reaction and etching, in a manner similar to the SALICIDE concept. Fabrication is begun by coating the exposed Si surface of a substrate with a transparent oxide film, such that the Si/oxide interface exhibits low surface recombination velocity. The interdigitated pattern is then etched through the oxide film by lithography to expose the Si surface and metallic electrode members are formed selectively in the exposed Si surface, using self-aligned metallization to produce thin interdigitated electrodes recessed below the silicon surface, which itself may be on a comparatively thin Si layer. The electrodes may be spaced to minimize the interdigital carrier transit time and maximize the sensitivity and the entire process and structure are compatible with conventional silicon integrated circuit (IC) technology. A further feature involves isolating the semiconductor surface layer from the substrate by a layer that may be either 1) transparent and insulating, 2) optically absorbing, or 3) optically reflecting, so that the photocarriers recombine before they can be collected by the field. In the latter case, the photodetector acts as a resonant cavity, resulting in an increase in the number of carriers that are generated, and hence a more sensitive device.

High speed silicon-based lateral junction photodetectors having recessed

A system for making porous silicon on blank and patterned Si substrates by 'immersion scanning', particularly suitable for fabricating light-emitting Si devices and utilizing an open electrolytic cell having a cathode and an opposing anode consisting of a Si substrate on which the porous silicon is to be formed, both disposed, with their opposing surfaces in parallel, in an aqueous HF solution electrolyte contained in the cell. The substrate anode is mounted to be movable relative to the electrolyte so as to be mechanically cycled or scanned in and out of the electrolyte at a programmable rate during anodization. The uniformity, thickness and porosity of the resulting anodized layer on the substrate are determined by the scanning speed, number of cycles, current density, and HF-based electrolyte parameters of the system, and the Si substrate resistivity, conductivity type, and crystal orientation. The light-emitting silicon devices produced incorporate porous silicon layers and are operable at room temperature.

Immersion scanning system for fabricating porous silicon films

A system for making porous silicon on blank and patterned Si substrates by 'immersion scanning', particularly suitable for fabricating light-emitting Si devices and utilizing an open electolytic cell having a cathode and an opposing anode consisting of a Si substrate on which the porous silicon is to be formed, both disposed, with their opposing surfaces in parallel, in an aqueous HF solution electrolyte contained in the cell. The substrate anode is mounted to be movable relative to the electrolyte so as to be mechanically cycled or scanned in and out of the electrolyte at a programmable rate during anodization. The uniformity, thickness and porosity of the resulting anodized layer on the substrate are determined by the scanning speed, number of cycles, current density, and HF-based electrolyte parameters of the system, and the Si substrate resistivity, conductivity type, and crystal orientation. The light-emitting silicon devices produced incorporate porous silicon layers and are operable at room temperature.

Apparatus for producing porous silicon on a substrate

A process is disclosed for making CMOS devices with enhanced performance PMOS FETS by integrating germanium technology into a silicon-based fabrication method. Silicon-germanium layers are selectively grown on the surfaces of oxide-isolated PFET pockets of a silicon substrate previously prepared by a conventional silicon CMOS process. A silicon cap is deposited over each Si--Ge layer and gate insulator is formed over the cap provide gate dielectric for the PFETS. Gate insulator is formed over the NFET pockets to provide gate dielectric for the NFETS. Gate structures are completed along with source and drain junctions in accordance with normal practice. Provision also is made for the additional selective growth of a second silicon-germanium layer on the surfaces of oxide-isolated NFET pockets on the same CMOS substrate to enhance the performance of the NFETS as well as that of the PFETS.

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Ridgefield, CT, United States of America

Vijay P Kesan