Chartered Semiconductor Manufacturing Ltd (corporation)

Vijaikumar Chhagan

Yelehanka Ramachandramurthy Pradeep

Tjin Tjin Tjoa

A method of fabricating a gate stack having an endpoint detect layer and a multi-step etch process to prevent damage to a gate dielectric layer. The special endpoint detect layer emits an endpoint signal that allows the etch chemistry to be changed to a more selective polysilicon to oxide ratio to prevent damage to the gate oxide layer. The invention begins by forming a gate dielectric layer over a substrate. We then form an endpoint detect layer over the gate dielectric layer. A gate stack is formed over the bottom silicon layer. Then a mask is formed over the gate stack. The mask defines a gate electrode. We etch the gate stack and the endpoint detect layer using a multi-step etch comprising at least 3 steps. In a main etch step, the gate stack and the endpoint detect layer are etched using a first etch chemistry. Upon an endpoint detection signal generated by etching the gate stack, the first etch step is stopped. In an endpoint detect layer etch step, the gate stack layer and the endpoint detect layer are etched using a second etch chemistry. The endpoint etch step is stopped when an endpoint detect signal changes upon reaching the gate dielectric layer. The second etch chemistry has a higher selectivity from the gate dielectric layer to the gate stack layer and endpoint detect layer than the first etch chemistry. In an overetch step, using a third etch chemistry with a higher selectivity than the second etch chemistry, we etch the endpoint detect layer without damaging the gate dielectric layer.

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Leicester, United Kingdom

Vijaikumar Chhagan