Qualcomm Incorporated

Qualcomm Technologies International, Ltd.

Victor Szeto

Milivoje M Aleksic

Cheng-Teh Hsieh

Meghal Varia

Serag Gadelrab

Jason Edward Podaima

Tom Longo

Clara Ka Wah Sung

Richard Boisjoly

In-Suk Chong

Steven McBirnie

Klauss Riess

Gary Hum

Various embodiments include methods and devices for implementing decompression of compressed high dynamic ratio fields. Various embodiments may include receiving compressed first and second sets of data fields, decompressing the first and second compressed sets of data fields to generate first and second decompressed sets of data fields, receiving a mapping for mapping the first and second decompressed sets of data fields to a set of data units, aggregating the first and second decompressed sets of data fields using the mapping to generate a compression block comprising the set of data units.

Compression of high dynamic ratio fields for machine learning

Various embodiments include methods and devices for implementing compression of high dynamic ratio fields. Various embodiments may include receiving a compression block having data units, receiving a mapping for the compression block, wherein the mapping is configured to map bits of each data unit to two or more data fields to generate a first set of data fields and a second set of data fields, compressing the first set of data fields together to generate a compressed first set of data fields, and compressing the second set of data fields together to generate a compressed second set of data fields.

A system and method communicates with one of two or more secure digital input output (SDIO) units that only one SDIO unit responds when it is being addressed. The SDIO unit has an SDIO clock input port, an SDIO data bus output port, and an SDIO bidirectional command port. Each SDIO unit has an address indicator within it associated with each SDIO unit. An SDIO unit will not respond to an SDIO command unless an SDIO unit address encoded in the SDIO command matches its address indicator.

Single SDIO interface with multiple SDIO units

A system and method communicates with one of two or more secure digital input output (SDIO) units that only one SDIO unit responds when it is being addressed. The SDIO unit has an SDIO clock input port, an SDIO data bus output port, and an SDIO bidirectional command port. Each SDIO unit has an address indicator within it associated with each SDIO unit. An SDIO unit will not respond to an SDIO command unless an SDIO unit address encoded in the SDIO command matches its address indicator. In some configurations, a single multiple SDIO (MSDIO) command may cause two or more SDIO units to return data to a host.

Multiple access single SDIO interface with multiple SDIO units

Single relay SDIO interface with multiple SDIO units

Growing community of inventors

Phoenix, AZ, United States of America

Victor Szeto