Navitas Semiconductor Limited

Victor Sinow

Daniel Marvin Kinzer

Thomas J Ribarich

Santosh Sharma

Tao Liu

Marco Giandalia

Weijing Du

Hongwei Jia

Matthew Anthony Topp

Ruixia Fei

Songming Zhou

Matteo Uccelli

Systems and methods for a GaN-based motor drive circuit using synchronous rectification is disclosed. In one aspect, a method of operating a motor drive circuit includes providing a half-bridge circuit including a high-side GaN switch and a low-side GaN switch coupled in series at an output node, providing a motor coupled to the output node, turning on the high-side GaN switch such that a first current flows through the motor, turning off the high-side GaN switch, turning on the low-side GaN switch when a voltage at the output node drops below a predetermined threshold voltage, sensing, using a sense device coupled to the low-side GaN switch, a magnitude of a second current that flows through the low-side GaN switch, and turning off the low-side GaN switch when the magnitude of the second current drops below a predetermined threshold current.

System and methods for motor drive using GAN synchronous rectification

Circuits and methods that control a rate of change of a drain voltage as a function of time in a transistor are disclosed. In one aspect, the circuit includes a transistor having a gate terminal that controls operation of the transistor, and a control circuit coupled to the gate terminal and arranged to change a voltage at the gate terminal at a first rate of voltage with respect to time from a first voltage to a first intermediate voltage, and further arranged to change the voltage at the gate terminal at a second rate of voltage with respect to time from the first intermediate voltage to a second intermediate voltage, where the first rate is different than the second rate.

Transistor DV/DT control circuit

Systems and methods that automatically detect state of switches in power converters are disclosed. In one aspect, a power switch includes a first switch coupled between a power input node and a first terminal of a load, a second switch coupled between the power input node and a second terminal of the load, first and second current sense devices arranged to transmit first and second signals including at least one of a magnitude and polarity of first and second currents through the first and second switches, respectively, a first driver circuit arranged to transmit first control signals to the first switch based at least in part on a voltage at the power input node and the first signal, and a second driver circuit arranged to transmit second control signals to the second switch based at least in part on the voltage at the power input node and the second signal.

Systems and methods for automatic determination of state of switches in power converters

Turn-off circuits. In one aspect, the turn-off circuit includes a transistor having a gate terminal, a source terminal and a drain terminal, a first pull-down circuit connected to the gate terminal, a second pull-down circuit connected to the gate terminal, and a third pull-down circuit connected to the gate terminal. In another aspect, the first, the second and the third pull-down circuits are arranged to cause a turn off of the transistor by changing a voltage at the gate terminal at a first rate of voltage with respect to time from an on-state voltage to a first intermediate voltage, and from the first intermediate voltage to a second intermediate voltage at a second rate of voltage with respect to time, and from the second intermediate voltage to an off-state voltage at a third rate of voltage with respect to time, wherein the first rate is higher than the second rate.

Transistor turn-off circuit

A circuit is disclosed. The circuit includes a current detecting FET, configured to generate a current signal indicative of the value of the current flowing therethrough, an operational transconductance amplifier (OTA) configured to output a current in response to the voltage of the current signal, and a resistor configured to receive the current and to generate a voltage in response to the received current, where the generated voltage is indicative of the value of the current flowing through the current detecting FET. The current detecting FET is configured to become nonconductive in response to the generated voltage indicating that the current flowing through the current detecting FET is greater than a threshold.

Overcurrent protection based on zero current detection

A current detecting GaN FET is disclosed. The current detecting GaN FET includes a first GaN switch having a first gate, a first drain, a first source, and a first field plate. The current detecting GaN FET also includes a second GaN switch having a second gate, a second drain, a second source, and a second field plate. The current detecting GaN FET also includes a resistor. The first and second gates are electrically connected, the first and second drains are electrically connected, and the resistor is connected between the first and second sources.

Current detection FET and resonant converter using the FET

A half bridge circuit is disclosed. The circuit includes low side and high side power switches selectively conductive according to one or more control signals. The circuit also includes a low side power switch driver, configured to control the conductivity state of the low side power switch, and a high side power switch driver, configured to control the conductivity state of the high side power switch. The circuit also includes a controller configured to generate the one or more control signals, a high side slew detect circuit configured to prevent the high side power switch driver from causing the high side power switch to be conductive while the voltage at the switch node is increasing, and a low side slew detect circuit configured to prevent the low side power switch driver from causing the low side power switch to be conductive while the voltage at the switch node is decreasing.

Power transistor control signal gating

A GaN resonant circuit is disclosed. The GaN resonant circuit includes a power switch configured to be selectively conductive according to one or more gate signals, and configured to generate a switch signal indicative of the value of the current flowing therethrough. The GaN resonant circuit also includes a power switch driver, configured to generate the gate signals in response to one or more control signals, where the power switch driver is configured to cause the power switch to become nonconductive in response to the switch signal indicating that the value of the current flowing through the power switch has transitioned across a threshold value.

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Fresno, CA, United States of America

Victor Sinow