Intel Corporation

Sandcraft, Inc.

Victor Shadan

Edward T Pak

Wei-Ping Lu

Anurag Nigam

Tejvansh Singh Soni

Yuan-ping Chen

A method and a device for maintaining logic state stored in a storage device are described. For one embodiment, the device precharges at least two complimentary nodes in a storage device during the precharge cycle. During the evaluation cycle, the device receives an input data. After receipt of the input data, device stores at least one logic state at a storage node according to the input data. The device includes at least one conducting path to limit one store per each evaluation stage.

Single phase edge trigger register

A memory cell comprising a storage cell and a comparison circuit. The storage cell has a second node and a third node. The comparison circuit is coupled to the storage cell and comprises a first plurality of transistors coupled in series to a first input and a second plurality of transistors coupled in series to a second input and coupled to the first plurality of transistors by a first node and by a source voltage node. A match line coupled to the first node indicates a miss when values on the first and second inputs are different than values stored in the storage cell.

Dynamically controlled, cross-stacked CAM cell

Growing community of inventors

Santa Clara, CA, United States of America

Victor Shadan