Littelfuse, Inc.

Victor Oliver L Tabell

Albert V Enriquez

Gordon Todd Dietsch

Maria Lily E Rosios

Keon Mayson A Brosas

Timothy Patel

A chip fuse includes a first terminal disposed on a first end of a fuse element array and a second terminal disposed on a second end of the fuse element array opposite the first end. The fuse element array includes multiple layers disposed in a stacked arrangement, each layer including a first terminal portion disposed within the first terminal, a second terminal portion disposed within the second terminal, a first fuse element portion orthogonal to and extending between the first terminal portion and the second terminal portion, and a second fuse element portion orthogonal to and extending between the first terminal portion and the second terminal portion. The first fuse element portion is adjacent the second fuse element portion.

Arrayed element design for chip fuse

Exemplary embodiments of the present disclosure of a fuse may include a fuse body having a first portion and a second portion. The first and second portions may be configured to mate together thereby forming an internal cavity. A first inner termination and a second inner termination may be at least partially attachable to the first and second portions of the fuse body at respective first and second ends. A fusible element may be disposed in the cavity of the fuse body and extendable from the first inner termination at the first end of the fuse body to the second inner termination at the second end of the fuse body. The fusible element may be attachable to the first inner termination at a first connection and the second inner termination at a second connection. The first and second connections may be inspectable when the fuse is in an assembled state.

Growing community of inventors

Mandaluyong, Philippines

Victor Oliver L Tabell