Maxim Integrated Products, Inc.

Victor Loginov

Kaveh Razazian

Maher Umari

Amir Hosein Kamalizad

Michael V Navid

Afshin Niktash

Kenneth E Garey

Nathan Goldstick

A power line communication (PLC) device includes a physical layer module including a transceiver configured to transmit and receive data over a power line. A medium access control (MAC) module is configured to send data to and process data from the physical layer module. The MAC module includes a channel access module configured to initiate a channel access attempt. The channel access module successively is configured to increase a random backoff period for a subsequent channel access attempt based on a random backoff function in response to a determination by the physical layer module that a PLC channel is busy during a preceding one of the channel access attempts. The channel access module successively is configured to selectively reset a variable in the random backoff function based on an output of a modulo function of a number of backoff attempts and a predetermined number.

Power line communication device with channel load measurement and improved channel access

According to one embodiment of the invention, an integrated circuit comprises an encoding module, a modulation module and a spectral shaped module. The encoding module includes an interleaver that adapted to operate in a plurality of modes including a first mode and a second mode. The interleaver performs repetitive encoding when placed in the second mode. The modulation module is adapted to compensate for attenuations that are to be realized during propagation of a transmitted signal over the power line. The spectral shaped module is adapted to compensate for amplitude distortion and further compensates for attenuations that will be realized during propagation of the transmitted signal over the power line.

System and method for applying multi-tone OFDM based communications within a prescribed frequency range

A power line communication (PLC) system includes a source node, a plurality of intermediate nodes and a destination node. Each of the source node, the plurality of intermediate nodes and the destination node comprise a PLC interface including a medium access control (MAC) module and a physical layer (PHY) module. A transformer is located between the source node and the destination node. Routing modules of the source node, one or more of the intermediate nodes, and the destination node establish a route from the source node to the destination node via one or more selected ones of the plurality of intermediate nodes. The route is selected using a route cost that is calculated based on link costs of a plurality of hops in the route from the source node to the destination node. The link costs are based on forward link costs and reverse link costs.

Routing for power line communication systems

An apparatus to process an input signal received via a power line in a power line communication system includes a jammer remover and a jammer detector. The jammer remover removes interference resulting from transmission of electricity and the input signal over the power line from the input signal. The jammer remover generates a jammer-canceled signal using an adaptive filtering procedure. The jammer detector is coupled to the jammer remover to detect the interference.

Jammer canceller for power-line communication

According to one embodiment of the invention, an integrated circuit comprises an encoding module, a modulation module and a spectral shaped module. The encoding module includes an interleaver that adapted to operate in a plurality of modes including a first mode, a second mod and a third mode. The interleaver performs repetitive encoding when placed in the second mode and even greater repetitive encoding when placed in the third mode.

Transmitter and method for applying multi-tone OFDM based communications within a lower frequency range

An embodiment is a method and apparatus to perform symbol synchronization. A sign element obtains signs of samples in a sample vector. A correlation estimator computes a correlation of the sample vector. A synchronization detector detects symbol synchronization. Another embodiment is a method and apparatus to perform frame synchronization. A Fast Fourier Transform (FFT) processing unit computes a current FFT vector and an accumulated previous FFT vector. The current FFT vector and the accumulated previous FFT vector correspond to sample vectors associated with preamble symbols prior to symbol synchronization detection. A real and imaginary processing unit generates real and imaginary summations using the current FFT vector and the accumulated previous FFT vector. A mode processor generates mode flags representing operational modes using the real and imaginary summations.

Robust wideband symbol and frame synchronizer for power-line communication

An embodiment is a method and apparatus to process an input signal. An analog automatic gain control (AGC) processor controls an analog adjustable gain of the input signal using a feedback mechanism. The analog AGC processor generates a first signal. A processing circuit transforms the first signal into a second signal. A digital AGC processor controls a digital adjustable gain of the second signal using a feed-forward mechanism.

Combined dual feed-forward and feedback analog and digital automatic gain control for broadband communication

An embodiment is a method and apparatus to perform symbol synchronization. A correlation estimator computes a correlation of a sample vector representative of a narrowband signal. A synchronization detector detects symbol synchronization. Another embodiment is a method and apparatus to perform frame synchronization. A Fast Fourier Transform (FFT) processing unit computes a current FFT vector and an accumulated previous FFT vector. The current FFT vector and the accumulated previous FFT vector correspond to sample vectors associated with preamble symbols. A real and imaginary processing unit generates real and imaginary summations using the current FFT vector and the accumulated previous FFT vector. A mode processor generates mode flags representing operational modes using the real and imaginary summations.

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Irvine, CA, United States of America

Victor Loginov