Intel Corporation

Viacheslav Suetinov

Hans Joakim Bangs

Nicholas Paul Cowley

Philip P Hackney

Ruchir Saraswat

Richard J Goldman

Mark S Mudd

In an embodiment, a system includes voltage sensing logic to determine a first source voltage Vcorresponding to a first source, and a controller to receive an indication of Vfrom the voltage sensing logic. The controller is to, responsive to V&#x3e;a first output voltage (V), select a first source first regulator to input Vand provide V; responsive to V&#x3e;a second output voltage (V), select a first source second voltage regulator that inputs V, and provide V; responsive to V&#x2264;V, select a second source first voltage regulator that inputs a second source voltage Vthat corresponds to a second source and is substantially constant in time where V&#x3e;V, and provide Vindependent of the first source first regulator and the first source second voltage regulator. Other embodiments are described and claimed.

Apparatus and method for instant on ability

An adjustable phase clock generator circuit is described that may include a DLL and a phase adjustor to further adjust the phase of a selected clock phase from the DLL. Both the DLL and phase adjustor may be formed from current starved delay elements that are biased from a common bias generator circuit.

Digital phase controlled delay circuit

Examples of a digital transceiver, a switched-capacitor sampling mixer, and an N-stage switched-capacitor amplifier are generally described herein. The digital transceiver may include a plurality of switched-capacitor sampling mixers and a plurality of N-stage switched-capacitor amplifiers. Each mixer samples a received differential RF signal. The pair of N-stage switched-capacitor amplifiers operates as charge redistribution amplifiers. Each N-stage switched-capacitor amplifier provides a near-constant capacitive load for one of the mixers.

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Swindon, United Kingdom

Viacheslav Suetinov