International Business Machines Corporation

Veronica S Davila

Trung Ngoc Nguyen

Todd Charles Sorenson

Brian Anthony Rinaldi

Enrique Q Garcia

Gary William Batchelor

Louis Alonso Rasor

Ronald David Martens

Robin Han

Jay T Kirch

Beth Ann Peterson

Juan A Coronado

Micah Robison

Herve G P Andre

Brian Sean McCain

Scott A Brewer

Jack Neil Licano, Jr

Daniel I Ibanez

A plurality of central processing units (CPUs) are allocated as a set of dedicated CPUs for processing tasks of an input/output (I/O) resource. In response to determining that a CPU utilization for the set of dedicated CPUs is less than a first predetermined threshold, at least one CPU of the set of dedicated CPUs is configured as a reserved CPU to execute tasks for one or more entities other than the I/O resource. In response to determining that a CPU utilization for the set of dedicated CPUs is greater than a second predetermined threshold, the reserved CPU is configured as a dedicated CPU to process tasks for the I/O resource.

Adjustment of the number of central processing units to meet performance requirements of an I/O resource

Provided are techniques for concurrent Input/Output (I/O) enclosure firmware/Field-Programmable Gate Array (FPGA) update in a multi-node environment. First notifications are sent to each I/O enclosure management engine on each of a plurality of server nodes that code activation for a first set of I/O enclosures is starting. An update image is distributed to the first set of I/O enclosures. The update image on the first set of I/O enclosures is activated by sending an activate reset command to each of the first set of I/O enclosures, wherein a reset is not propagated to other devices within each I/O enclosure in the first set of I/O enclosures in response to determining that the reset is an activate reset. In response to the activate reset command completing, second notifications are sent to each I/O enclosure management engine that code activation for the first set of I/O enclosures has completed.

Concurrent I/O enclosure firmware/field-programmable gate array (FPGA) update in a multi-node environment

A storage controller determines a presence of an indication from an Input/Output (I/O) enclosure that the I/O enclosure will be powered off after a predetermined amount of time. The storage controller quiesces all I/O adapters of the I/O enclosure, in response to receiving the indication. The storage controller quiesces the I/O enclosure, in response to completion of quiescing of all of the I/O adapters of the I/O enclosure.

Method, system, and computer program product for taking an I/O enclosure offline

An enterprise network interface client application and a local, central electronic complex (CEC) in a dual CEC environment implement an alternative method of communication. Upon a send failure of a command to a first CEC in the environment, the command is sent to a second CEC using a CEC to CEC message mechanism. A method of communicating an asynchronous event is implemented between a microcode layer and an enterprise network interface client application in a dual central electronic complex (CEC) environment. A copy of the event is retained. Upon a send failure of the event to a first CEC in the environment, the copy of the event is sent to a second CEC in the environment.

Alternate communication path between ESSNI server and CEC

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Tucson, AZ, United States of America

Veronica S Davila