Hewlett-packard Development Company, L.p.

Hewlett-packard Company

Hewlett-packard Corporation

Hewlett Packard Enterprise Development LP

Vernon L Knowles

Donald J Fasen

James Clifford Anderson

Rajeev Badyal

Bruce J Jackson

Ralph F Simmons, Jr

Robert E Kier

Jeffrey S McAllister

Carl R Hoerger

Richard D Barndt

William P Proctor

Roger V Wilcox

Ted A Brooks

Martin John Harper

Wallace H Overton

A tension feedback signal is generated to reduce tension variation on a tape occurring at a reel frequency. Tension variation information may be obtained and used to generate the tension feedback signal. The tension feedback signal may be combined with a constant tension preset signal. The combined signal may be used to drive a tape reel at a tape reel speed adjusted according to the combined signal.

Tension feedback for tape tension

The present disclosure provides techniques for operating a tape drive. A method of operating a tape drive includes monitoring a parameter of the tape drive during a data access operation. The method also includes detecting an access failure. The method further includes selecting a treatment based on the parameter, applying the treatment, and performing a retry.

Tape drive retry

An apparatus includes plural spaced apart sensors arranged along a direction of motion of a medium, and a processing circuit to receive signals from the sensors, determine a difference of the signals, and identify an error built into the medium based on the difference.

Identifying error built into a medium

A system and method for reducing tape wear in a magnetic tape system. A tape drive comprises a wrap reverse location controller. The wrap reverse location controller determines a magnetic tape reversal location. The tape drive reverses the direction of the magnetic tape at the reversal location. The wrap reverse location controller determines the tape reversal location by varying, relative to the tape heads, the longitudinal tape location at which tape direction reversals are performed at each end of the tape.

Tape drive with variable wrap reversal location

A system and method for overcoming adhesion between media and a surface of a storage device in contact with the media. A storage device comprises a media velocity detector and a media drive motor controller. The media velocity detector detects storage media velocity as torque is applied to a storage media. The media drive motor controller causes a media drive motor to apply acceleration torque to the storage media. If the media velocity detector detects no increase in media velocity as acceleration torque is applied to the storage media, then the media drive motor controller causes the media drive motor to apply a torque pulse to the storage media.

Storage device with pulsed motor torque

In one embodiment, an arrangement of elements on a head includes a first group of data element spanning a first distance on the head and a second group of data elements spanning a second spanning distance on the head greater than the first spanning distance. The second group of elements overlaps the first group of elements such that some elements are common to both groups.

Read and write head element arrangement

To access data on a storage medium, at least three servo stripes simultaneously recorded in a servo track are read. The at least three servo stripes have different orientations on the servo track. An indication of a lateral position of a storage medium access head with respect to the servo track is generated based on reading the at least three servo stripes.

Recording servo stripes onto a servo track

Electromagnetic tape head position is adjusted according to vibration indicative information received from vibration sensor secured to tape transport mechanism that supports the tape head.

Method and apparatus for storing data on magnetic tape

In one embodiment, a servo positioning method includes deriving a first servo signal Sfrom a first servo band, deriving a second servo signal Sfrom a second servo band, defining a head element reference between the servo bands, weighting each servo signal according to a ratio of distances between the head element reference and a location on each servo band, and computing a servo control signal based on the weighted servo signals.

Weighting servo signals for head positioning

A head-track alignment system and method. An embodiment of the system comprises: a head assembly capable of detecting arrival of servo frames in a first and second servo track of a tape; an alignment processor coupled to the head assembly generating a head-track alignment signal based on a comparison of the arrival times of the servo frames in the first and second servo tracks; and wherein the head-track alignment signal can be generated while accessing the tape. An embodiment of the method comprises: determining tape tilt with respect to a head assembly of a tape drive while accessing a tape, and compensating for the tape tilt.

Head-track alignment

A device for reading data from or writing data to magnetic storage media, the device comprising a head having a plurality of read/write elements for reading data from or writing data to magnetic storage media in respective tracks, and a plurality of servo elements for reading servo code from the media in respective bands different from the data tracks, the read/write elements and servo elements being arranged such that a plurality of the tracks operated on by the read/write elements are disposed between two servo bands operated on by two of the servo elements.

Device for reading data from or writing data to magnetic storage media

A system for minimizing seek time in a disk drive having a power amplifier for controlling a servo actuator. The system includes at least one output terminal of the power amplifier connected to a processor for detecting and calculating a head room voltage for the power amplifier for seek operations, the head room voltage indicative of a margin of power available for controlling seek operations. A preferred method includes calculating a head room voltage for the power amplifier by detecting a saturation value of the amplifier during an acceleration phase in a first seek direction, and detecting an output voltage during a deceleration phase for a second seek operation in an opposite direction. The method further includes adjusting power to the power amplifier on a next seek operation based on the head room voltage calculated, such that at least some of the margin of power available identified by the head room voltage is used on the next seek operation for reducing seek time.

Method and apparatus for minimizing seek time in a disk drive by

A method and apparatus for implementing a zero order hold function in the digital to analog conversion process in a digital control system reduces the phase lag contributed by the digital to analog conversion process relative to a conventional implementation of the zero order hold function. The apparatus for implementing the reduced phase lag zero order hold function employs a digital signal processor, a plurality of digital buffers, a digital multiplexing element, and a digital to analog converter. Phase lag is reduced by generating, from the digital to analog converter, for a fraction of the sample period, a waveform having a constant analog voltage with an amplitude which is scaled by the reciprocal of said fraction relative to a conventional zero order hold function. During the remainder of the sample period a substantially constant offset analog voltage is generated by the digital to analog converter. Alternatively, the time compression and amplitude scaling required to implement the reduced phase lag zero order hold function can be performed within the digital signal processor in the digital control system.

Method and apparatus for reducing phase lag resulting from digital to

A CMOS power-on reset circuit has a delay capacitor to provide a predetermined delay period. Charging and discharging of the delay capacitor is controlled by the state of a flipflop circuit. An input comparator monitors a power supply input voltage. An invalid input voltage level immediately changes the reset output signal to the invalid state and discharges the capacitor. Even after the input voltage has recovered to a valid level, recharging the capacitor is delayed until the capacitor has substantially discharged, thereby ensuring at least a predetermined delay period after the last fault condition. The reset output signal is coupled in a feedback configuration so as to lower the threshold voltage when the reset output switches to the valid state, to allow limited power supply sag, for example due to motor start-up, without resetting the circuit. Multiple power supply voltages are continuously monitored in a CMOS integrated configuration by additional input scaling resistor networks and input comparators, all coupled to the common 2-level threshold voltage node.

CMOS power-on reset circuit

A CMOS power-on reset circuit has a delay capacitor to provide a predetermined delay period. Charging and discharging of the delay capacitor is controlled by the state of a flipflop circuit. An input comparator monitors a power supply input voltage. An invalid input voltage level immediately changes the reset output signal to the invalid state and discharges the capacitor. Even after the input voltage has recovered to a valid level, recharging the capacitor is delayed until the capacitor has substantially discharged, thereby ensuring at least a predetermined delay period after the last fault condition. The delay capacitor is coupled in a feedback configuration so as to lower the threshold voltage when the delay capacitor voltage indicates to the valid state, to allow limited power supply sag, for example due to motor start-up, without resetting the circuit. Multiple power supply voltages are continuously monitored in a CMOS integrated configuration by additional input scaling resistor networks and input comparators, all coupled to the common 2-level threshold voltage node.

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Boise, ID, United States of America

Vernon L Knowles