Ncr Corporation

Vernon K Schnathorst

Gary Thomas Bastian

A high speed priority interrupt system which permits a microcomputer to service a plurality of peripheral units on a priority basis is provided. Interrupt address jump vectors corresponding to the routines for servicing the peripheral devices are stored in a read only memory and are selectively transferred to a program counter in accordance with a predetermined priority basis to allow the microcomputer to interrupt its program and service one or more peripheral devices requesting access to the microcomputer. The interrupt system minimizes the time required by the microcomputer for interruption of the current program, servicing of the peripheral units, and resumption of the interrupted program.

Priority interrupt system for microcomputer

An electronic circuit for regulating the entry of new data into a static synchronous register comprising a bank of D type, master-slave flip-flops. The circuit selectively passes the first phase of a two-phase, nonoverlapping clock signal used for synchronization and control of the data. A bootstrap operated, series pass, transistor configuration couples the first phase signal to the electrode actuating the master stage of each flip-flop. With provisions for the series pass transistor to transition into a conductive state prior to the onset of the first phase signal, the circuit ensures substantial replication of the first phase signal characteristics in terms of both time and amplitude.

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Monument, CO, United States of America

Vernon K Schnathorst