Brocade Communications Systems, Inc.

Macom Connectivity Solutions, LLC

Ampere Computing LLC

Vexata, Inc.

Venkatesh Nagapudi

Somesh Gupta

Dariush Dabiri

Tarun Gupta

Satsheel Altekar

Zahid S Hussain

Gary Paul McClannahan

Surya Parkash Varanasi

Satish Sathe

Ramkumar Vadivelu

Mark William Branstad

Vinodh Ravindran

Yash V Bansal

Vikram Bichal

Gustavo Lau

Gary Mcclannahan

Yash Bansal

Various embodiments provide for a system that integrates 64 bit ARM cores and a switch on a single chip. The RISC style processors use highly optimized sets of instructions rather than the specialized set of instructions found in other architectures (e.g., x86). The system also includes multiple high bandwidth ports that enable multi-ported virtual appliances to be built using a single chip. The virtual appliances are software implemented versions of the physical appliances that are installed with servers to provide network services such routing and switching services, firewall, VPN, SSL, and other security services, as well as load balancing. The virtual appliances are implemented in software and the system can add new virtual appliances, or change the functions performed by existing virtual appliances flexibly without having to install or remove physical hardware.

Virtual appliance on a chip

Described is an improved storage architecture. In a particular aspect an improved storage architecture with increased throughput to Ethernet storage modules due to elimination of data path handling from a main control CPU is set forth. Other method and apparatus are described therein, including a scalable Ethernet storage module particularly suited for usage with the improved storage architecture described herein.

Storage architecture for storage class memories

Cable systems and assemblies integrate a reduced number of twin axial cables to transmit and received in a full-duplex transmission signals at transmission speeds greater than or equal to one hundred Giga bytes per second. The reduced number of twin axial cables comprise four or less twin axial cables, in which each pair forms a single twin axial full-duplex cable for passive or active communication of the signals at multiple different transmission rates concurrently. A processor can be integrated with the twin axial cables and operate to encode the signals for fast transmission speeds at the different transmission rates.

Multi-rate transmissions over twinax cables

Cable systems and assemblies integrate a reduced number of twin axial copper pairs to transmit and received in a full-duplex transmission signals at transmission speeds greater than or equal to one hundred Giga bytes per second. The reduced number of twin axial copper pairs comprise four or less twin axial copper pairs, in which each pair forms a single twin axial full-duplex cable for passive or active communication of the signals. A processor can be integrated with the twin axial copper pairs operate to encode the signals for fast transmission speeds.

Duplex transmission over reduced pairs of twinax cables

A converged network adapter in sleep mode can allow a management entity to access and alter configuration of the network adapter over the network. Configuration data such as configuration parameters, firmware, and other data related to the network adapter can be stored in a memory, which can be coupled to a portion of the adapter that receives power during sleep mode. The management entity can send configuration messages to the adapter, which messages can include commands or instructions to read or write contents of the memory. The messages can include values of the configuration parameters to be altered, firmware code, etc. The management entity can also send configuration messages to a baseboard management controller (BMC) coupled to the adapter for message validation. The adapter and the BMC can send results of memory operations back to the management entity in response messages.

Systems and methods for reconfiguring a network adapter in sleep mode

A network device is adaptively configured to compress an output data stream, responsive to congestion in the network. The network device receives indications of network congestion from another network device. Upon receipt of a congestion indication, the network device can adapt the compression technique to attempt to achieve more or less compression, depending on whether the congestion indication indicates more or less congestion. By adapting the compression to the level of network congestion, end-to-end latency of the network can potentially be decreased.

Congestion-adaptive compression

A technique for interrupt moderation allows coalescing interrupts from a device into groups to be processed as a batch by a host processor. Receive and send completions may be processed differently. When the host is interrupted for receive completions, it may check for send completions, reducing the need for interrupts related to send completions. Timers and a counter allow coalescing interrupts into a single interrupt that can be used to signal the host to process multiple completions. The technique is suitable for both dedicated interrupt line and message-signaled interrupts.

Interrupt moderation

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Milpitas, CA, United States of America

Venkatesh Nagapudi