Spansion Llc.

Venkat Natarajan

Willy Obereiner

Joe Yuen Tom

Jeremy Isaac Nathaniel Werner

Russell Barck

George Minassian

Hyun Soo Lee

An architecture is presented that facilitates integrated security capabilities. A memory module is provided that comprises non-volatile memory that stores security software and a security processor that accesses the security software from the nonvolatile memory and performs security functions based on the security software stored. Further, a host processor located outside of the memory module arbitrates with the security processor for access to the non-volatile memory. The memory module in communication with the host processor establishes a heightened level of security that can be utilized in authentication services and secure channel communications.

Secure co-processing memory controller integrated into an embedded memory subsystem

A machine implemented system and method that effectuates secure access to a flash memory associated with a mobile device. The system includes a security component that intercepts transactions between an external processor and the flash memory and implements authentication and access control to the flash memory. The system further includes components that can partition the flash memory and can associate authentication and access control information with the partitioned flash memory.

Multiple stakeholder secure memory partitioning and access control

Systems and methods that facilitate processing data, such as by encryption/decryption, and storing and retrieving data to/from memory such that actual data can be distinguished from information associated with, or representative of, erased/blank memory locations. A processor can include a comparing component that compares information input to the processor to determine whether such information is associated with actual data, or associated with, or representative of, erased/blank memory locations. Information associated with, or representative of, an erased/blank memory location can be processed so that it can be interpreted as such by other components. If actual data is processed such that the comparing component interprets the processed data to be equivalent to an erased/blank memory location, then the data can be re-processed, so it is not interpreted as such, before being forwarded to its next destination.

Systems and methods for distinguishing between actual data and erased/blank memory with regard to encrypted data

Systems and methods that facilitate processing data and securing data written to or read from memory. A processor can include a host memory interface that monitors all bus traffic between a host processor and memory. The host memory interface can analyze commands generated by the host processor and determine the validity of the commands. Valid commands can proceed for further analysis; invalid commands can be aborted, for example, with the host memory interface and memory each set to an idle state. The host memory interface can analyze authentication information obtained via an authentication component, and information regarding memory partition rights, to determine whether a command partition violation exists as to the command. If a violation exists, the host memory interface can prevent the improper command from executing in the memory, and can cause a different operation to occur thereby allowing the memory to be placed in a known state.

Systems and methods for access violation management of secured memory

The claimed subject matter provides systems and/or methods that facilitate sharing of a memory, having a single channel of access, between two or more processors. A host processor can be operatively connected to a co-processor and the memory in series. The host processor can execute in place to enable it to execute code directly from the memory, and can arbitrate access to the memory bus and thus the memory, so that the host processor can perform all memory fetches to the memory without interruption by the co-processor. The co-processor can be implemented as a finite state machine, and only accesses the memory during read or write cycles issued by the host processor. Various types of co-processors can be employed to perform various functions, such as cryptography and digital signal processing, for example. The memory can be volatile or non-volatile memory.

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Cupertino, CA, United States of America

Venkat Natarajan