Lsi Logic Corporation

Venkat C Ghanta

Arun K Gunda

Kaushik De

A system and method identifies Iddq test vectors to be used in IDDQ testing of large CMOS circuits. This is achieved through intelligent preprocessing techniques. By monitoring only those nodes in the circuit that may be responsible for leakage current in the steady state, the size of the simulation results file is drastically reduced. The reduced simulation results file makes simulation a viable solution for IDDQ vector identification.

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Sunnyvale, CA, United States of America

Venkat C Ghanta