Nokia Mobile Phones Limited

Veijo L Kontas

Raimo K Kivari

Jaakko A Hulkko

Juha Pikkarainen

Lauri T Siren

A sigma-delta signal converter is implemented using switched capacitor switching elements in which a first switch (31) serves as a mixer (11). The output of the mixer is directed to the second input of an adder (16), and its second input is the feedback signal (f1) of the sigma-delta signal converter, which is also directed into a base-frequency output signal through a decimator (14) and low-pass filtering (15).

Demodulation of an intermediate frequency signal by a sigma-delta

A method and modulator for modulating a digital signal to an analog intermediate-frequency signal. A baseband digital signal (I, Q) is taken to a digital-to-analog converter (71, 710) in which it is sampled at a certain sampling frequency (f.sub.in) and converted to an analog signal. The conversion produces a baseband signal (f.sub.sig) and signals (N*f.sub.in, f.sub.Ni) at multiples of the sampling frequency (f.sub.in). The sampling frequency is increased, advantageously according to a sigma-delta D/A conversion, and one of the signals (N*f.sub.in,f.sub.Ni) at multiples of the sampling frequency (f.sub.in), produced by the conversion, is selected as the output signal (f.sub.IF), advantageously a multiple (N*f.sub.in, f.sub.Ni) of the sampling frequency that is directly at the intermediate frequency or transmission frequency.

Method and modulator for modulating digital signal to higher frequency

A method and system for operating a radiotelephone at reduced power provides for a deenergization of a receiver of the radiotelephone wherein the receiver, during periods of activation, receives a sequence of messages of a control channel, each message having a synchronization portion and a data portion which follows the synchronization portion. Included within the radiotelephone is signal processing circuitry synchronized by a synchronization portion of an individual one of the messages to permit a reading of data of the data portion of an individual one of the messages. A digital phase locked lop (DPLL) with phase adjustment capability enables operation of synchronization circuitry and the data reading circuitry. Electronic circuitry within the DPLL provides for inhibiting the phase adjustment function in response to the command of a controller of the radiotelephone subsequent to a reading of data and concurrently with a termination of power to the receiver. The phase adjustment function is enabled upon reactivation of the receiver and operation of the data reading circuitry for reading data of a subsequent message.

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Oulu, Finland

Veijo L Kontas