Ams Ag

Veeresh Babu Vulligaddala

Ravi Kumar Adusumalli

Rohit Ranganathan

Krishna Kanth Avalur

Sudhakar Singamala

Chandra Nyshadham

Parvathy Sasikala Jayachandran Pillai

An analog-to-digital converter () comprises a first and a second sampling capacitor (), a first integrator (), a first and a second input switch () coupling a first input terminal () and a common mode terminal () to a first electrode of the first sampling capacitor (), a third and a fourth input switch () coupling a second input terminal () and the common mode terminal () to a first electrode of the second sampling capacitor (), a fifth and a sixth input switch () coupling a second electrode of the first sampling capacitor () to an amplifier common mode terminal () and the first integrator input (), and a seventh and an eighth input switch () coupling a second electrode of the second sampling capacitor () to the amplifier common mode terminal () and the second integrator input ().

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Hyderabad Telangana, India

Veeresh Babu Vulligaddala