Quality Semiconductor Inc.

Varad Srinivasan

Ketan K Mehta

Sanjay V Gala

A semiconductor memory device is disclosed which is partitionable into random access memory (RAM) and content addressable memory (CAM) subfields, and with which incremental comparisons may be efficiently conducted. The apparatus generally includes a memory array of N data storage locations of M bits each which may be divided into predefined segments, a means for comparing a search word with all data words stored in the array, a means for generating a match signal when the bits of the search word match the bits of the data words, and a configuration register and a plurality of transfer gates for selecting which of the predefined array segments are to function solely as random access memory. The apparatus may additionally include a plurality of storage means, each corresponding to a segment of the memory array, for storing the match signals generated from that corresponding segment during a comparison.

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Los Altos Hills, CA, United States of America

Varad Srinivasan