Texas Instruments Corporation

Vance Risinger

James Craig Spurlin

An output driver for use with low voltage level, high speed data transmission busses. An open drain output transistor has a controlled slew rate for a high to low output transition. The slew rate control is provided by controlling the slew rate of the gate voltage of the output transistor in response to an input transition. A slew rate control circuit coupled to the output transistor includes a current source powered by a high stability bias generator, a diode and a capacitance. The current source controls the amount of current available at the gate of the output transistor. The diode and the capacitance combined are used to control the initial voltage at the gate of the output transistor, and the slew rate for the rising voltage waveform at the gate of the output transistor. The resulting circuit has a fast transition time in response to an input transition combined with a tightly controlled slew rate. The output circuit described can meet the proposed specifications for the low voltage level, fast transition busses currently being developed.

Output driver with slew rate control

An output driver circuit for use with low voltage level, high speed data transmission busses which require slew and skew control of the output voltage transitions. An open collector output transistor has a controlled slew rate for both the high to low and low to high output transitions. The slew rate control is provided by controlling the slew rate of the base voltage of the output transistor in response to an input transition. A slew rate control circuit coupled to the output transistor includes a current source powered by a high stability bias generator, one or more output feedback circuits, an output level compensation circuit, and a base discharge circuit. The current source controls the amount of current available at the base of the open collector output transistor. The feedback circuits are used to control the initial voltage at the base of the output transistor, and the slew rate for the rising voltage at the base of the output transistor. The output level compensation circuit is used to vary the current into the base of the output driving transistor when the low output voltage level crosses certain predetermined thresholds. The discharge circuit is used to control the rise time when the output voltage transistors from a low to a high output level. The resulting circuit has a fast transition time in response to an input transition combined with a tightly controlled slew rates and skew. The output driver circuit described can meet the proposed specifications for the low voltage level, fast transition busses currently being developed.

Output driver with slew and skew rate control

A rectifier/multiplier/level shifter utilizing multiple capacitors which are switched from parallel to series or vice versa. An analog signal is communicated to a plurality of capacitors in parallel which are subsequently connected in series by selective switching. Depending upon the sign of the analog signal, taps are made on the capacitors so as to rectify the incoming analog signal. In a similar fashion a tap utilizes the serial multiplication of the capacitors so as to create a multiplier circuit. This particular architecture is particularly well suited for a metal-oxide-silicon (MOS) embodiment.

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Vance Risinger