Synopsys, Inc.

Van E Morgan

Janet L Olson

Jovanka Ciric Vujkovic

Eyal Odiz

David John Seibert

Maurizio Damiani

Tsuwei Ku

A system expands an existing library based on simultaneous optimization of a circuit design being built and the library cells being used. The system receives a library of cells and a circuit design and performs synthesis and optimization of the circuit design. The system evaluates the circuit design to identify portions that may be candidates for new library cells. The system analyzes the library to determine whether there is an existing library cell that can be used, whether the new libcell should be added to the library, or whether the new libcell should replace an existing libcell. The system performs modeling for the new libcell to measure the improvement obtained by use of the new libcell. The system recommends the new libcell for addition to the library based on the performance modeling.

Library design and co-optimization with a circuit design

Systems and techniques are described for optimizing an integrated circuit (IC) design. Some embodiment can perform enumeration on a hardware description language (HDL) description of an IC design to obtain a enumerated IC design that includes at least one technology-independent wide-gate or technology-independent wide-bus, wherein the technology-independent wide-gate represents a logical function that is performed on a variable number of inputs, and wherein the technology-independent wide-bus represents a variable number of signals that are part of a bus. The embodiments can then perform technology-independent IC optimization, synthesis, and technology-dependent IC optimization to obtain an optimized and synthesized IC design.

Optimizing an integrated circuit (IC) design comprising at least one wide-gate or wide-bus

Systems and techniques are described for designing an integrated circuit (IC). Some embodiments identify and preserve slices by using new objects in an IC design data model. One or more IC design representations that are used in an IC design flow may natively support such slice objects. These new objects can enable rapid access and preservation of slices, thereby improving the runtime and/or quality of results (QoR) of an IC design system.

Identifying and using slices in an integrated circuit (IC) design

Systems and techniques are described for designing an integrated circuit (IC). Some embodiments explicitly represent wide-buses as distinct objects in an IC design data model. One or more IC design representations that are used in an IC design flow may natively support such wide-bus objects. These new objects can enable rapid access and preservation of wide-buses, thereby improving the runtime and/or quality of results (QoR) of an IC design system.

Creating and using a wide-bus data structure to represent a wide-bus in an integrated circuit (IC) design

Systems and techniques are described for designing an integrated circuit (IC). Some embodiments explicitly represent wide-gates as distinct objects in an IC design data model. One or more IC design representations that are used in an IC design flow may natively support such wide-gate objects. These new objects can enable rapid access and preservation of wide-gates, thereby improving the runtime and/or quality of results (QoR) of an IC design system.

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Phoenixville, PA, United States of America

Van E Morgan