Maxlinear, Inc.

Vamsi Paidi

Raja Pullela

Wenjian Chen

Glenn Chang

Abhishek Jajoo

Curtis Ling

Timothy Leo Gallagher

Sheng Ye

Madhukar Reddy

Sangeetha Gopalakrishnan

Shanta Murthy Prem Swaroop

Anand Anandakumar

Stephane Laurent-Michel

Subramanian Anantharaman Chandrasekarapuram

Raghava Manas Bachu

Shantha Murthy Prem Swaroop

Rahul Bhatia

Pawan Tiwari

Methods and systems for a pseudo-differential low-noise amplifier at Ku-band may comprise a low-noise amplifier (LNA) integrated on a semiconductor die, where the LNA includes first and second differential pair transistors with an embedded inductor tail integrated on the semiconductor die. The embedded inductor tail may include: a first inductor with a first terminal capacitively-coupled to a gate terminal of the first differential pair transistor and a second terminal of the first inductor coupled to second, third, and fourth inductors. The second inductor may be coupled to a source terminal of the first differential pair transistor, the fourth inductor may be coupled to a source terminal of the second differential pair transistor, and the third inductor may be capacitively-coupled to a gate terminal of the second differential pair transistor and also to ground. The second inductor may be embedded within the first inductor.

Method and system for a pseudo-differential low-noise amplifier at KU-band

Aspects of methods and systems for high frequency signal selection are provided. The system for high frequency signal selection comprises a first driver and a second driver. The first driver is able to receive a first high frequency input, and the second driver is able to receive a second high frequency input. The output of the first driver is operably coupled, via a first inductive element, to a first resistive load and a first buffer, and the second driver is operably coupled, via a second inductive element, to the output of the first driver. One or both of the first high frequency input and the second high frequency input may be transferred to the first buffer by selectively enabling a current to one or both of the first driver and the second driver, respectively.

Method and system for high frequency signal selection

Methods and systems for a sampled loop filter in a phase locked loop (PLL) may comprise a phase locked loop (PLL) comprising a phase frequency detector, a sampled loop filter comprising a plurality of capacitors and at least one switch, a plurality of voltage controlled oscillators (VCOs) coupled to said sampled loop filter, and a frequency divider. The PLL generates at least one clock signal, and the sampled loop filter samples an output signal from the phase frequency detector when an average of charge provided to a first of the plurality of capacitors in the sampled loop filter is zero. The frequency divider may be a fractional-N divider. A second switch in said sampled loop filter may have switching times that are non-overlapping with switching times of the at least one switch. Capacitors may be coupled to ground from each terminal of the second switch.

Method and system for a sampled loop filter in a phase locked loop (PLL)

A direct broadcast satellite (DBS) reception assembly may comprise an integrated circuit that is configurable between or among a plurality of configurations based on content requested by client devices served by the DBS reception assembly. In a first configuration, multiple satellite frequency bands may be digitized by the integrated circuit as a single wideband signal. In a second configuration, the satellite frequency bands may be digitized by the integrated circuit as a plurality of separate narrowband signals. The integrated circuit may comprise a plurality of receive paths, each of the receive chains comprising a respective one of a plurality of low noise amplifiers and a plurality of analog-to-digital converters.

Configurable, highly-integrated satellite receiver

Method and system for a pseudo-differential low-noise amplifier at Ku-band

A system comprises a microwave backhaul outdoor unit having a first resonant circuit, phase error determination circuitry, and phase error compensation circuitry. The first resonant circuit is operable to generate a first signal characterized by a first amount of phase noise and a first amount of temperature stability. The phase error determination circuitry is operable to generate a phase error signal indicative of phase error between the first signal and a second signal, wherein the second signal is characterized by a second amount of phase noise that is greater than the first amount of phase noise, and the second signal is characterized by a second amount of temperature instability that is less than the first amount of temperature instability. The phase error compensation circuitry is operable to adjust the phase of a data signal based on the phase error signal, the adjustment resulting in a phase compensated signal.

Outdoor unit resonator correction

Methods and systems for a configurable low-noise amplifier with programmable band-selection filters may comprise a receiver with a low-noise amplifier (LNA) with first and second input terminals and differential output terminals; a low pass filter operably coupled to the LNA; a high pass filter operably coupled to the second input terminal of the LNA; and a signal source input coupled to the low pass filter and the high pass filter. The LNA may be operable to receive signals in a pass band of the high pass filter and a pass band of the low pass filter. The receiver may be operable to amplify input signals in the pass band of a first filter but not signals in the pass band of the second filter by operably coupling the second to ground.

Method and system for a configurable low-noise amplifier with programmable band-selection filters

Methods and systems for a distributed transmission line multiplexer for a multi-core multi-mode voltage-controlled oscillator (VCO) may comprise a plurality of voltage controlled oscillators (VCOs) arranged adjacent to each other, where each of the plurality of VCOs are operable to generate an output signal at a configurable frequency, an impedance matching circuit comprising a respective driver and impedance matching elements coupled to each of the plurality of VCOs, and an output device coupled to the impedance matching circuit. The impedance matching elements may include capacitors and inductors. Between each adjacent pair of the respective drivers coupled to each of the plurality of VCOs, the impedance matching elements may include two inductors coupled in series between the drivers and a capacitor coupled to ground and to a common node between the two inductors. Impedance values of the capacitors and inductors may be configurable. The impedance matching elements may include a resistor coupled to a bias voltage VDD and to a common node with a capacitor that is coupled to ground, where the common node is coupled to one of the inductors. The output device may include a prescaler that is an integer or fractional frequency-N divider, or a buffer. The respective drivers coupled to each of the plurality of VCOs may be configured to provide a constant output power no matter which of said plurality of VCOs is enabled.

Method and system for a distributed transmission line multiplexer for a multi-core multi-mode voltage-controlled oscillator (VCO)

Methods and systems for a pseudo-differential low-noise amplifier at Ku-band may comprise a low-noise amplifier (LNA) integrated on a semiconductor die, where the LNA comprises differential pair transistors with an embedded inductor tail integrated on the semiconductor die. The embedded inductor tail may comprise: a first inductor with a first terminal capacitively-coupled to a gate terminal of a first transistor of the differential pair transistors and a second terminal of the first inductor coupled to second, third, and fourth inductors. The second inductor may be coupled to a source terminal of the first transistor of the differential pair transistors, the fourth inductor may be coupled to a source terminal of the second transistor of the differential pair transistors, and the third inductor may be capacitively-coupled to a gate terminal of the second transistor of the differential pair transistors and also to ground. The second inductor may be embedded within the first inductor.

Methods and systems for a multi-core multi-mode voltage-controlled-oscillator (VCO) may comprise generating a plurality of oscillating signals utilizing a plurality of voltage controlled oscillators (VCOs) arranged symmetrically on an integrated circuit, where interconnects for the VCOs may be arranged in quiet zones at locations equidistant from each pair of the plurality of VCOs. An interconnection ring may be centered within the arranged VCOs that comprises at least two conductive lines that couple to output terminals of each of said plurality of VCOs. The plurality of VCOs may receive control signals from interconnects coupled to at least one conductive line in the interconnection ring. The plurality of VCOs may receive control signals from a conductive line in said interconnection ring. A positive terminal of a first VCO of a pair of adjacent VCOs of the plurality of VCOs may be coupled to a same conductive line of the interconnection ring as a negative terminal of a second of the pair of adjacent VCOs. The interconnection ring ay be circular. Impedances may couple the VCOs to the interconnection ring. Bias signals may be communicated to each of the plurality of VCOs from the interconnection ring. The plurality of VCOs may include four VCOs arranged equidistant from a center point.

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Carlsbad, CA, United States of America

Vamsi Paidi