Advanced Micro Devices Corporation

Vallath Nandakumar

Bahadir Erimli

Shashank C Merchant

Robert Alan Williams

Ching Yu

John Mingyung Chiang

Chandan Egbert

Ian Lam

Eric Tsin-Ho Leung

Xiaohua Zhuang

Edward Yang

A network switch having switch ports for full-duplex communication of data packets with respective network nodes according to Ethernet (IEEE 802.3) protocol that flexibly assigns memory access slots to access an external memory according to programmable information. A scheduler within an external memory interface assigns the memory access slots to the respective network switch ports according to a programmed sequence written into an assignment table memory from an external programmable data storage device.

Apparatus and method for programmable memory access slot assignment

An apparatus and method are disclosed for maintaining free buffer information for a network switch. A first Random Access Memory (RAM), located on the network switch, functions to store values that indicate whether or not free buffers, located in a second RAM, are available for storing received data frames. An input logic is provided for placing values in the first RAM to indicate which free buffers are available for storing the data frames. When free buffers are required to store data frames, the output logic searches the first RAM and locates values that indicate available free buffers in the second RAM. The output logic then generates buffer pointers that address the locations of the free buffers in the second RAM. The buffer pointers that are generated are stored in a small capacity queue on the network switch to provide immediate availability to free buffers.

Method and apparatus for maintaining randomly accessible free buffer information for a network switch

A network switch having switch ports for full-duplex communication of data packets with respective network nodes according to Ethernet (IEEE 802.3) protocol dynamically allocates external memory bandwidth slots between high data rate ports. An external memory interface determines if a high data rate port makes a request for a bandwidth slot and grants the request if made. The slot is taken from a selected group which is a subset of the total number of slots. If a request for the slot is not made, the external memory interface assigns the slot to another high data rate port. Lower data rate ports in the network switch are assigned fixed slots from those slots not from within the selected group of slots. The dynamic allocation of bandwidth slots between the high data rate port enables the efficient use of limited memory bandwidth resources.

Apparatus and method in a network switch for dynamically assigning memory interface slots between gigabit port and expansion port

A network switch having switch ports for full-duplex communication of data packets with respective network nodes according to Ethernet (IEEE 802.3) protocol that allocates a prescribed number of external memory bandwidth slots between high data rate ports based on the compared amount of network traffic on the respective ports. A scheduler within an external memory interface initially assigns memory access slots to the respective high data rate ports according to a prescribed sequence. If the scheduler subsequently detects that the network data traffic on a port having less slots is higher than the traffic on a port having more slots, the slots are swapped between the high data rate ports. Additionally, a clock multiplexer in one of the high data rate ports adjusts the data rate of the port dependent upon the number of slots assigned to that port. The swapping of bandwidth slots between the high data rate ports along with the adjustment of the port clock rate enables the efficient use of limited memory bandwidth resources.

Apparatus and method in a network switch for swapping memory access slots between gigabit port and expansion port

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Campbell, CA, United States of America

Vallath Nandakumar