Tektronix, Inc.

Virtual Corporation

Valdis E Garuts

Clifford H Moulton

Bozidar Janko

J Lynn Saunders

Cornelis T Veenendaal

Jonathan David Birck

Hans J Greub

David Arthur Hannaford

A probe for testing integrated circuits includes a stiff elastic substrate including a conductive plane, the substrate having a major portion with fingers projecting therefrom in cantilever fashion. A layer of dielectric material is adhered to the substrate and has a main surface remote from the substrate. A plurality of conductor runs are adhered to the layer of dielectric material at the main surface thereof. The conductor runs extend over at least some of the fingers and are configured to form transmission lines when the conductive plane is connected to a reference potential level.

Probe with microstrip transmission lines

A variable transition time generator has a differential emitter follower circuit that has a push-pull signal at the inputs for driving each end of a timing capacitor. An independently variable timing current source is coupled to each end of the timing capacitor. A differential buffer amplifier passes the voltage across the timing capacitor to an output. A d.c. compensation circuit has a statically biased emitter follower pair of transistors that are driven independently by a pair of variable compensation current sources that track the independently variable timing current sources, the output of which is combined with the output of the buffer amplifier. Also combined with the output of the buffer amplifier is a step correction output derived from the differential input signal. The result is a high speed variable transition time generator that simultaneously produces independently controllable opposite polarity transitions.

Variable transition time generator

A dual output balun distributes substantially all of the available power in a single ended input signal applied thereto (less small parasitic losses) equally to two or more pairs of push-pull output terminals (or vice versa).

Balun providing dual balanced outputs

A transformer-based coupling network permits a push-pull amplifier to be used with single ended signals, while providing constant gain and, if desired, bidirectional impedance matching, from RF down to DC.

Push-pull transformer coupled RF amplifier with response to DC

An electrical circuit system for measuring the acoustic admittance of the ear cavity, for use in single and multiple tone tympanometry and acoustic reflex response testing, in which the probe tone applied to the ear cavity can be varied over a wide frequency range and a wide range of admittance variation can be measured. The signal output of the system, derived from the output signal of a microphone located in the ear cavity, is a DC voltage accurately proportional to the logarithm of the measured admittance of the ear cavity. An RMS to DC converter, an error integrator and an exponential element provide a closed control loop system for a variable gain amplifier so as to maintain the microphone output signal level constant regardless of admittance variations in the ear cavity. The level of the signal applied to the probe tone driver to accomplish this is a measure of the cavity admittance.

Acoustic admittance measuring apparatus with wide dynamic range and

A sample and hold network is provided having an analog multiplier that multiplies the analog input signal by a sinusoidal strobe signal to produce a multiplied signal. The multiplied signal is filtered by a bandpass differentiating filter and is combined in a differential amplifier with the analog input signal to yield a periodically sampled and held version of the analog input signal. The bandpass differentiating filter attenuates or eliminates undesirable DC and frequency components.

Analog multiplier based sample and hold network

A single-ended to differential coupling device includes an input coaxial transmission line feeding sections of output coaxial transmission line across a break or gap between the outer conductors of the output transmission lines. A shunt resistor across the input transmission line and a series resistor interposed between the center conductors of the output transmission lines provide exact impedance matching in conjunction with plural ferrite toroids disposed about at least one of the transmission lines to prevent shorting of the input signal.

Balanced, impedance matched, coupling device

A probe assembly for use in conveying signals between cables from test apparatus and contact areas on a contact face of an integrated circuit includes a support member having an aperture therein and a dielectric membrane clamped over the aperture such that conductive bumps mounted on the underside of the periphery of the membrane engage corresponding contact areas on an upper surface of the support member surrounding the aperture. A central area of the membrane extends downward through the aperture such that conductive bumps on the under side of the central area of the membrane engage contact areas on the contact face of an integrated circuit situated below the aperture. A plurality of conductor runs supported by the membrane extend from the conductive bumps in the central area of the membrane to the conductive bumps in the periphery of the membrane. A plurality of second conductor runs supported by the support member extend from the contact areas surrounding the aperture to test apparatus cable connectors adjacent to the periphery of the support member.

Multiple lead probe for integrated circuits in wafer form

The present invention constitutes a differential amplifier system (50) including a main differential amplifier (60) and a compensating differential amplifier (90) which are coupled together in a complementary manner to provide a composite output signal. The amplifiers are of similar construction but have different circuit component values. Each of the amplifiers is of the differential type and includes emitter-coupled transistors (62) and (64) or (92) and (94), a feedback resistor (66) or (96) connected between the emitter leads (78) and (80) or (108) and (110) of these transistors and a pair of constant-current sources (68) and (70) or (98) and (100) separately connected to different ones of the emitter leads of the transistors. The circuit values of the constant-current sources and feedback resistors in the two amplifiers are different and are adjusted to allow the output of the compensating amplifier to cancel primary nonlinearities in the output of the main amplifier. The gain of the overall amplifier system is thereby maintained more nearly constant over a greater signal range and the composite output of the system is more linear over a wider range of input signals.

Wideband linearized emitter feedback amplifier

An FET high frequency analog amplifier circuit employs a feed-forward technique to provide a first order correction of amplifier distortion. In one embodiment, the amplifier is configured as a differential set of cascode FET stages. A linearization stage is connected across the output cascode transistors to provide a cancellation signal to reduce amplifier nonlinearities. The linearizing circuit includes a pair of field effect transistors in source-coupled arrangement with their respective bases driven by the drains of the differential amplifier input transistors. The gates are further driven by biasing current sources. The drains of the linearizing transistors are cross connected to the drains of the cascode output transistors, thereby injecting a compensating error signal into each differential output node and cancelling circuit nonlinearities. The amplifier is well suited for fabrication in integrated circuit form, especially using gallium arsenide technology.

FET transconductance amplifier with improved linearity and gain

The present invention provides a parallel or 'flash' analog-to-digital converter circuit (A) including a plurality of voltage comparators (20a-20g) arranged in first and second sets (F and E) adapted for receiving separate analog input signals. A push-pull configuration is employed in providing the analog input signal to the comparators of the two sets. The analog inputs (22a-22d) of the comparators (20a-20d) in the first set are provided in input signal V.sub.1 and the analog inputs (22e-22g) of the comparators (20e-20g) in the second set are provided an input signal V.sub.2 of equal magnitude but opposite polarity. Different reference voltages are provided to the reference inputs (24a-24g) of the comparators by a series-connected resistor network (H). Two encoders (I and J) and an adder (K) are used to detect the number of output signals from the comparators in a similar logic state and provide a digital binary output signal corresponding to the number of such outputs. The present invention can be implemented in an alternative embodiment (L) that includes a source (M) of constant voltage which offsets the amplitude of one of the input signals V.sub.1 or V.sub.2. This enables the use of a simplified resistor network (N) that provides reference voltages which can be applied to reference inputs of comparators in both sets. The present invention can also be implemented advantageously as an integrated circuit of compact layout that minimizes cross talk among signals flowing through the circuit and thereby enhances the precision thereof.

Analog-to-digital converter with push-pull input signal configuration

A sample and hold network samples an input data signal at a periodic rate by differentiating the input data signal and multiplying it in an analog multiplier by a strobe signal, whose spectrum extends to at most twice the highest frequency in the data input signal. The output of the multiplier is combined in a differential amplifier with the input data signal to provide an output having a slope which is zero and also equal to the input data signal at times that are integral multiples of the period of the strobe signal.

Sample and hold network

A continuously variable high frequency resistance attenuator is described in which the attenuation is first order independent of frequency. The wave translating media into and out of the attenuator provide a constant characteristic impedance. The attenuator consists of a length of series resistance and a plurality of parallel shunt resistors, which are of adjustable value and extend between the length of series resistance and ground or extend between the length of series resistance and open circuit.

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Beaverton, OR, United States of America

Valdis E Garuts