Omni Design Technologies, Inc.

Vaibhav Tripathi

Vikas Singh

Denis Clarke Daly

Jagdish Kumar Agrawal

A latchup detector includes a level shifter and a comparator. The level shifter is electrically coupled to a voltage supply rail to receive as inputs a regulator output voltage and a target supply voltage. The level shifter includes a first level-shifter circuit that lowers the regulator output voltage to a first voltage and a second level-shifter circuit that lowers the target supply voltage to a second voltage. The comparator receives as inputs the first and second voltages. The comparator produces a first output voltage when the difference between the first and second voltages is greater than or equal to a predetermined voltage difference and a second output voltage when the difference between the first and second voltages is less than the predetermined voltage difference. The first output voltage can correspond to a latchup event.

Latchup detector and clock loss detector

A time-interleaved circuit includes an input buffer, a plurality of track-and-hold circuits, and a plurality of isolation inductors. The input buffer is configured to receive an input signal having an input voltage and to output an output signal having an output voltage. The track-and-hold circuits are electrically coupled in parallel with each other. Each track-and-hold circuit is electrically coupled in series with the input buffer. Each isolation inductor is electrically coupled to the output of the input buffer and at least one of the track-and-hold circuits.

Time-interleaved A/D converters with isolation inductors

A piecewise linear gain amplifier circuit includes a differential preamplifier and a plurality of transconductors. The differential preamplifier is electrically coupled to a differential input having an input voltage. The transconductors are electrically coupled in parallel with each other. Each transconductor includes a respective differential input that is electrically coupled to a differential output of the differential preamplifier. In addition, each transconductor includes a respective differential output that is electrically coupled to a common differential PWL output. Each transconductor has a different linear input range. An optional attenuation circuit can be electrically coupled in parallel to the differential preamplifier. The differential output of the attenuation circuit can be electrically coupled to a differential input of another transconductor, and that transconductor can have a differential output that is electrically coupled to the common differential PWL output.

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Santa Clara, CA, United States of America

Vaibhav Tripathi