Intel Corporation

Vahidreza Parichehreh

Jeremy D Ecton

Leonel R Arana

Robert Alan May

Hiroki Tanaka

Oscar Ojeda

Arnab Roy

Chung Kwang Tan

Aleksandar Aleksov

Kristof Darmawikarta

Brandon C Marin

Yonggang Li

Veronica Aleman Strong

Suddhasattwa Nad

Xiaoying Guo

Changhua Liu

Keith J Martin

Microelectronic assemblies, and related devices and methods, are disclosed herein. For example, in some embodiments, a microelectronic assembly may include a substrate layer having a surface; a first conductive trace having a first thickness on the surface of the substrate layer; and a second conductive trace having a second thickness on the surface of the substrate layer, wherein the second thickness is different from the first thickness. In some embodiments, the first conductive trace and the second conductive trace have rectangular cross-sections.

Microelectronic assemblies having conductive structures with different thicknesses

Embodiments include a package structure with one or more layers of dielectric material, where an interconnect bridge substrate is embedded within the dielectric material. One or more via structures are on a first surface of the embedded substrate, where individual ones of the via structures comprise a conductive material and have a tapered profile. The conductive material is also on a sidewall of the embedded substrate.

Via structures having tapered profiles for embedded interconnect bridge substrates

Embodiments disclosed herein include a lithographic patterning system and methods of using such a system to form a microelectronic device. The lithographic patterning system includes an actinic radiation source, a stage having a surface for supporting a substrate with a resist layer, and a prism with a first surface over the stage, where the first surface has a masked layer and is substantially parallel to the surface of the stage. The prism may have a second surface that is substantially parallel to the first surface. The first and second surfaces are flat surfaces. The prism is a monolithic prism-mask, where an optical path passes through the system and exits the first surface of the prism through the mask layer. The system may include a layer disposed between the mask and resist layers. The mask layer of the prism may pattern the resist layer without an isolated mask layer.

Prism-mask for angled patterning applications

A package for an electronic device may include a first layer. The first layer may include a first dielectric material. The first layer may have a planar first surface. The first layer may have a variable thickness. A second layer may be coupled to the first layer. The second layer may include a second dielectric material and may have a planar second surface. The second layer may have a variable thickness. A seam may be located at an interface between the first layer and the second layer, and the seam may have an undulating profile. The package may include at least one electrical trace, for example located in the first layer or the second layer.

Electronic device package with reduced thickness variation

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Gilbert, AZ, United States of America

Vahidreza Parichehreh