Broadcom Corporation

Western Digital Corporation

Western Digital Technologies, Inc.

Vafa James Rakshani

Claude G Hayek

Ahmadreza Rofougaran

Maryam Rofougaran

Frederic Christian Marc Hayem

Hooman Darabi

Nelson Ray Sollenberger

Nariman Yousefi

Richard William Hull

Robert L Cloke

David Price Turner

Manolito Catalasan

Tim Sippel

Yossi Cohen

Richard Unda

Edmund H Spittles

Lawrence John Madar, Iii

Vinay Bhasin

Chenmin Zhang

Zhiqing Zhuang

Jalil Fadavi-Ardekani

Paul Penzes

Weidong Rick Li

Charles Royston Patton, Iii

Carl Bonke

Alvin Lin

Marc E Acosta

Sam H Liu

Chaoyang Zhao

David B Joan

Charles W Simmons

Musaravakkam Samaram Krishnan

Ronald E Wilson

Soheyla Kamal, Legal Representative

Frederic Christian Hayem

Provided is a method for transferring data from one clock domain within a synchronizer to another domain within the synchronizer. The method includes determining system clock parameters within the synchronizer and analyzing a first domain clock signal based upon the system clock parameters. Next, a second domain clock signal is analyzed based upon the first domain clock signal and the system clock parameters. A determination is made as to when to transfer data from a first clock domain to a second clock domain in accordance with the analysis of the first and second domain clock signals, and an enable signal is provided to affect the data transfer from the first domain to the second clock domain.

Method and system for advance high performance bus synchronizer

A system and technique for detecting a device that requires power is implemented with a power detection station. The power detection system includes a detector having an output and a return which are coupled together by the device when the device requires power. The detector includes a word generator for generating test pulses for transmission to the device via the detector output, and a comparator for comparing the detector output with the detector return. The power detection station has a wide variety of applications, including by way of example, a switch or hub.

System and method for detecting a device requiring power

A state machine and an external interface, including its associated input-outputs (IOs), are always powered on and used to manage the chip power modes and power mode transitions. The chip power modes are defined as RUN, HIBERNATE, POWERDOWN, with many more possible with this invention. For example, once the device is in HIBERNATE or POWERDOWN modes, the power supplies to the IC are either reduced, or completely disconnected except for this controller state machine. This invention's state machine and control mechanism, in response to some external 'wake up event', will bring the chip to RUN mode by managing the state of the external power supplies through its control interface. The implementation achieves small die size and extreme low power consumption.

Method for managing and controlling the low power modes for an integrated circuit device

An RFIC includes an RF section, a memory interface, a display interface, an audio codec, a bus matrix, and a processing unit. The RF section converts a first inbound RF signal into a first inbound symbol stream and converts a second inbound RF signal into a second inbound symbol stream. The memory interface is operably coupled to retrieve a video file from memory and the display interface is operable to provide video data to a display. The audio codec converts an output digital signal into an output voice signal. The processing unit converts the first inbound symbol stream into streaming video data; converts the second inbound symbol stream into the output digital signal; and facilitates providing, via the bus matrix, at least one of: the video file to the display interface as the video data; the streaming video data to the display interface as the video data; and the digital output signal to the audio codec.

Multi-mode cellular IC for multi-mode communications

An integrated circuit (IC) includes at least one baseband section, at least one radio frequency (RF) section, and an interface module. The interface module is configured to couple the at least one baseband section to the at least one RF section, wherein the interface module includes an analog interface module and a digital interface module.

IC with mixed mode RF-to-baseband interface

An integrated circuit (IC) includes a first processing module that converts inbound data into an inbound digital audio signal and converts an outbound digital audio signal into outbound data. A second processing module performs a user application that includes at least one of generating of an inbound analog audio signal and generating an outbound analog audio signal. A third processing module performs an operating system algorithm to coordinate operation of at least one user application.

Multi-mode IC with multiple processing cores

A Voice-Data-RF IC includes a baseband processing module, an RF section, and an interface module. The baseband processing module converts an outbound voice signal into an outbound voice symbol stream, converts an inbound voice symbol stream into an inbound voice signal, converts outbound data into an outbound data symbol stream, and converts an inbound data symbol stream into inbound data. The interface module provides selective coupling between the baseband processing module, the RF section, and with off-chip circuits.

Voice/Data/RF integrated circuit

A Voice-Data-RF IC includes a baseband processing module, an RF section, and an interface module. The baseband processing module converts an outbound voice signal into an outbound voice symbol stream, converts an inbound voice symbol stream into an inbound voice signal, converts outbound data into an outbound data symbol stream, and converts an inbound data symbol stream into inbound data. The RF section converts an inbound RF voice signal into the inbound voice symbol stream, converts the outbound voice symbol stream into an outbound RF voice signal, converts an inbound RF data signal into the inbound data symbol stream, and converts the outbound data symbol stream into an outbound RF data signal. The interface module provides coupling between the baseband processing module, the RF section, and with off-chip circuits.

Voice/data/RF integrated circuit

A communication device includes a memory module that stores a plurality of applications corresponding to a plurality of uses of the communication device. A processing module executes a selected one of the plurality of applications and selects one of a plurality of power modes based on a current one of the plurality of uses of the communication device corresponding to the selected one of the plurality of applications. The processing module generates a power mode signal based on the selected one of the plurality of power modes. A power management circuit receives the power mode signal and that generates a plurality of power supply signals based on the power mode signal.

Power management for a mobile communication device and method for use therewith

An integrated circuit (IC) includes at least one baseband section, at least one radio frequency (RF) section, and an interface module. The interface module is operable to couple the at least one baseband section to the at least one RF section, wherein the interface module includes an analog interface module and a digital interface module.

An integrated circuit (IC) includes an RF section, a DSP, and a plurality of processors. The RF section and the DSP process an inbound RF signal to produce inbound data and process outbound data to produce an outbound RF signal. In addition, the DSP converts an outbound analog audio signal into an outbound digital audio signal and converts an inbound digital audio signal into an inbound analog audio signal. A first processor converts the inbound data into the inbound digital audio signal and converts the outbound digital audio signal into the outbound data. A second processor performs a user application that includes at least one of generation of the inbound analog audio signal and generation of the outbound analog audio signal and performs an operating system algorithm to coordinate operation of the user application.

A memory cell for reducing the cost and complexity of modifying a revision identifier (ID) or default register values associated with an integrated circuit (IC) chip, and a method for manufacturing the same. The cell, which may be termed a 'Meta-Memory Cell' (MMCEL), is implemented on metal layers only and utilizes a dual parallel metal ladder structure that traverses and covers each metal and via layer from the bottom to the top of the metal layer structure of the chip. One of the metal ladders is connected to a power supply at the bottom metal layer, corresponding to a logic 1, and another metal ladder is connected to ground at the bottom metal layer, corresponding to a logic 0. The output of the MMCEL can thus be inverted at any metal or via layer and can be inverted as often as required. Significant cost savings are achieved because a revision ID or default register bits may be modified by altering only those metal layers where design changes are necessary.

Memory cell for modification of revision identifier in an integrated circuit chip

An adjustable antenna interface includes a single-ended to differential conversion circuit, an adjustable impedance matching circuit, an RF differential switch, and an input. The single-ended to differential conversion circuit converts inbound RF signals from single-ended signals to differential signals and converts outbound RF signals from differential signals to single-ended signals. The adjustable impedance matching circuit provides an impedance based on an impedance control signal. The RF differential switch provides the differential outbound RF signals from the IC to the single-ended to differential conversion circuit in accordance with a first antenna control signal and provides the differential inbound RF signals from the single-ended to differential conversion circuit to the IC in accordance with a second antenna control signal. The input receives the first antenna control signal, the second antenna control signal, and the impedance control signal from the IC.

Adjustable antenna interface and applications thereof

A system and method for regulating power consumption within an integrated circuit (IC) with a modular design. The IC is designed so that any one distinct functional module within the IC utilizes only transistors with a substantially same or similar critical voltage level, which may for example be the threshold voltage of the transistors. Consequently, the supply voltage delivered to each functional modules can be lowered to the minimum voltage necessary to enable the transistors within the module to operate. Similarly, modules within the IC may be designed with transistors which share a common value for a substrate bias voltage or a clock speed, or with a combination of common values for several electrical factors. In this way, it is possible to reduce power consumption by fine-tuning the voltages supplied to (or clock speeds driving) specific modules, in a way which is custom-tuned to each module.

Integrated circuit with modular dynamic power optimization architecture

A communication device includes a voice data and RF integrated circuit (IC) that includes a memory module that stores a plurality of applications corresponding to a plurality of uses of the communication device. A processing module executes a selected one of the plurality of applications and selects one of a plurality of power modes based on a current one of the plurality of uses of the communication device corresponding to the selected one of the plurality of applications. The processing module generates a power mode signal based on the selected one of the plurality of power modes. An off-chip power management circuit receives the power mode signal and that generates a plurality of power supply signals to the voice data and RF IC based on the power mode signal.

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Newport Coast, CA, United States of America

Vafa James Rakshani