Intel Corporation

Uzi Sarel

Jacob Subag

Tomer Schwartz

Yaniv Fais

Lev Faivishevsky

Tomer Bar-On

Amitai Armon

Jeremie Dreyfuss

Amit Bleiweiss

Ehud Cohen

Yahav Shadmiy

Gal Leibovich

Michael Behar

Itamar Ben-Ari

Guy Jacob

Barak Hurwitz

Raanan Yonatan Yehezkel Rohekar

Gal Novik

Haim Barad

Eran Geva

Moshe Island

Eli Kfir

Arie Narkis

Tatiana Surazhsky

Amital Armon

Piotr Rozenfeld

In an example, an apparatus comprises a plurality of execution units comprising and logic, at least partially including hardware logic, to receive a plurality of data inputs for training a neural network, wherein the data inputs comprise training data and weights inputs; represent the data inputs in a first form; and represent the weight inputs in a second form. Other embodiments are also disclosed and claimed.

Real time context dependent deep learning

Systems, apparatuses and methods may provide for technology that processes an inference workload in a first subset of layers of a neural network that prevents or inhibits data dependent branch operations, conducts an exit determination as to whether an output of the first subset of layers satisfies one or more exit criteria, and selectively bypasses processing of the output in a second subset of layers of the neural network based on the exit determination. The technology may also speculatively initiate the processing of the output in the second subset of layers while the exit determination is pending. Additionally, when the inference workloads include a plurality of batches, the technology may mask one or more of the plurality of batches from processing in the second subset of layers.

Deep learning inference efficiency technology with early exit and speculative execution

In an example, an apparatus comprises logic, at least partially including hardware logic, to implement a lossy compression algorithm which utilizes a data transform and quantization process to compress data in a convolutional neural network (CNN) layer. Other embodiments are also disclosed and claimed.

Low rank matrix compression

In an example, an apparatus comprises a plurality of execution units comprising at least a first type of execution unit and a second type of execution unit and logic, at least partially including hardware logic, to expose embedded cast operations in at least one of a load instruction or a store instruction; determine a target precision level for the cast operations; and load the cast operations at the target precision level. Other embodiments are also disclosed and claimed.

Variable precision and mix type representation of multiple layers in a network

A mechanism is described for facilitating memory handling and data management in machine learning at autonomous machines. A method of embodiments, as described herein, includes detecting multiple tables associated with multiple neural networks at multiple autonomous machines, where each of the multiple tables include an index. The method may further include combining the multiple tables and multiple indexes associated with the multiple tables into a single table and a single index, respectively, where the single table is communicated to the multiple autonomous machines to allow simultaneous processing of one or more portions of the single table using one or more memory devices and one or more processors of one or more of the multiple autonomous machines.

Smart memory handling and data management for machine learning networks

In an example, an apparatus comprises logic, at least partially including hardware logic, to implement a lossy compression algorithm which utilizes a data transform and quantization process to compress data in a convolutional neural network (CNN) layer.

In an example, an apparatus comprises a plurality of execution units; and logic, at least partially including hardware logic, to determine a sub-graph of a network that can be executed in a frequency domain and apply computations in the sub-graph in the frequency domain. Other embodiments are also disclosed and claimed.

Sub-graph in frequency domain and dynamic selection of convolution implementation on a GPU

Growing community of inventors

Zichron-Yaakov, Israel

Uzi Sarel