Sma Solar Technology Ag

Uwe Stickelmann

Henrik Wolf

Benedikt Kuenzel

Christian Bode

Roland Zuelch

A method for testing an inverter having a bridge comprising a first switch (T) arranged between a positive connection (DC+) of a divided link circuit, having a center point (M), and a positive inner connection (PI), a second switch (T) arranged between the positive inner connection (PI) and a bridge output (BR), a third switch (T) arranged between the bridge output (BR) and a negative inner connection (NI), a fourth switch (T) arranged between the negative inner connection (NI) and a negative connection (DC−) of the divided link circuit, a fifth switch (T) arranged between the center point (M) and the positive inner connection (PI), and a sixth switch (T) arranged between the center point (M) and the negative inner connection (NI) is disclosed. A grid filter having a filter inductor (LF) and a filter capacitor (CF) is connected to the bridge output (BR). The method comprises applying a link circuit voltage to the divided link circuit, while the bridge output (BR) is isolated from a connected grid using the connected grid filter, fully discharging the filter capacitor (CF), closing the first switch (T) and the sixth switch (T), while the fourth switch (T) and the fifth switch (T) are open, subsequently clocking the second switch (T) using a plurality of short pulses, wherein the duty cycle of the short pulses is predetermined between 1% and 5%, subsequently to the clocking determining a voltage dropped across the filter capacitor (CF) and identifying a fault state of the bridge when the voltage dropped is outside of a voltage window with an upper window limit and a lower window limit. An inverter is also disclosed, which has a control system designed and set up to execute the method according to one of the preceding claims and to connect the inverter to a connected grid only if a fault state is not identified.

Method for self-testing of a phase of a 3-level ANPC converter with LC filter

A method for switching off power semiconductor switches in a bridge circuit having first through sixth power semiconductor switches. The method includes a switch-off process for establishing a final switch configuration in which all power semiconductor switches in the bridge circuit are in a switched-off state. Over the course of the switch-off process, a switch configuration is established in which the fifth power semiconductor switch and the sixth power semiconductor switch are concurrently in a switched-on state, while the first power semiconductor switch and the fourth power semiconductor switch are in a switched-off state. Also disclosed is a bridge circuit having a control circuit configured to carry out such a method. In addition, an inverter that includes at least one bridge circuit of this type is also provided.

Method for switching off power semiconductor switches in a bridge circuit, bridge circuit, and inverter comprising a bridge circuit

A method provides current limitation in the event of transient voltage variations at an AC output of a multilevel inverter that includes a bridge circuit with a first DC input, a second DC input, a neutral terminal and a bridge output, as well as a line filter with a choke connected between the bridge output and the AC output, and a capacitor connected between the AC output and the neutral terminal. In the method, depending on the voltage at the capacitor, when a first current threshold is exceeded by the choke current, a regular operating mode is interrupted and measures for current limitation are initiated. A multilevel inverter is further disclosed including a control circuit that is configured to carry out such a method.

Method for current limitation in the event of transient voltage variations at an AC output of a multi-level inverter and a multi-level inverter

A wiring testing device configured to test the wiring correctness of an inverter is disclosed. The inverter is configured to be connected to a low-voltage three-phase system with a neutral conductor serving as a reference point for grid-side conductor voltages. The wiring testing device includes a test circuit configured to measure the grid-side conductor voltages and determine an average value from the sum of the instantaneous values of the grid-side conductor voltages, and a display unit configured to display an error message if the average value exceeds a threshold voltage for a defined time period. The wiring testing device further includes a capacitor connected between a phase of the three-phase system and the neutral conductor configured to generate a voltage imbalance if the neutral conductor connection is missing, wherein the test circuit is configured to measure the conductor voltages and determine the voltage imbalance.

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Kaufungen, Germany

Uwe Stickelmann