Infineon Technologies Ag

Infineon Technologies Austria Ag

Uwe Hoeckele

Hermann Gruber

Dirk Meinhold

Klemens Pruegl

Dirk Offenberg

Ines Uhlig

Emanuele Bruno Bodini

Felix Braun

Albert Birner

Thomas Fischer

Uwe Seidel

Thomas Kunstmann

Roland Hampp

Hubert Maier

Reinhard Goellner

Christof Jalics

Walter Preis

Sandra Obernhuber

Joerg Adler

Patricia Nickut

Joachim Mahler

Alfons Dehe

Carsten Ahrens

Carsten Von Koblinski

Wolfgang Lehnert

Ulrich Krumbein

Juergen Steinbrenner

Rudolf Berger

Markus Kahn

Stefan Woehlert

Anton Prueckl

Daniel Porwol

Gerhard Metzger-Brueckl

Bernhard Knott

Arnaud Walther

Johann Strasser

Herbert Gietler

Thomas Detzel

Tobias Schmidt

Stefan Willkofer

Juergen Wagner

Kurt Matoy

Berthold Schuderer

Holger Doepke

Helmut Schoenherr

Manfred Frank

Matthias Schmidt

Kai-Alexander Schreiber

Christian Krenn

Claus Von Waechter

Franz Xaver Muehlbauer

Christian Schweiger

Tanja Schest

Christian Altschaeffl

Elfriede Kraxner Wellenzohn

Silvana Fister

Christoph Brunner

Tanja Ippisch

A method for sealing an access opening to a cavity comprises the following steps: providing a layer arrangement having a first layer structure and a cavity arranged adjacent to the first layer structure, wherein the first layer structure has an access opening to the cavity, performing a CVD layer deposition for forming a first covering layer having a layer thickness on the first layer structure having the access opening, and performing an HDP layer deposition with a first and second substep for forming a second covering layer on the first covering layer, wherein the first substep comprises depositing a liner material layer on the first covering layer, wherein the second substep comprises partly backsputtering the liner material layer and furthermore the first covering layer in the region of the access opening, and wherein the first and second substeps are carried out alternately and repeatedly a number of times.

Method for sealing an access opening to a cavity and MEMS component comprising a sealing element

Techniques are discloses regarding methods of manufacturing an imager as well as an imager device.

Method of manufacturing an imager and imager device

Embodiments related to a method of manufacturing of an imager and an imager device are shown and depicted.

A bonded system includes a reconstituted wafer including a hygroscopic material. A moisture barrier layer is arranged over a surface of the reconstituted wafer. An adhesive layer is arranged over a surface of the moisture barrier opposite the reconstituted wafer. A carrier is arranged over a surface of the adhesive layer opposite the moisture barrier. The adhesive layer adhesively bonds the reconstituted wafer and the carrier together.

Bonded system and a method for adhesively bonding a hygroscopic material

A passivation layer and a method of making a passivation layer are disclosed. In one embodiment the method for manufacturing a passivation layer includes depositing a first silicon based dielectric layer on a workpiece, the first silicon based dielectric layer comprising nitrogen, and depositing in-situ a second silicon based dielectric layer on the first silicon based dielectric layer, the second dielectric layer comprising oxygen.

Passivation layer and method of making a passivation layer

A method for producing a semiconductor device having a sidewall insulation includes providing a semiconductor body having a first side and a second side lying opposite the first side. At least one first trench is at least partly filled with insulation material proceeding from the first side in the direction toward the second side into the semiconductor body. The at least one first trench is produced between a first semiconductor body region for a first semiconductor device and a second semiconductor body region for a second semiconductor device. An isolating trench extends from the first side of the semiconductor body in the direction toward the second side of the semiconductor body between the first and second semiconductor body regions in such a way that at least part of the insulation material of the first trench adjoins at least a sidewall of the isolating trench. The second side of the semiconductor body is partly removed as far as the isolating trench.

Method for producing a semiconductor device

A semiconductor device and method are disclosed. The semiconductor device includes a substrate having a first region and a second region and an insulating layer arranged on the substrate. A first conductive layer is arranged in or on insulating layer in the first region and a second conductive layer is arranged in or on the insulating layer in the second region. The first conductive layer comprises a first conductive material and the second conductive layer comprises a second conductive material wherein the first conductive material is different than the second conductive material. A metal layer is arranged on the first conductive layer.

Conductive lines and pads and method of manufacturing thereof

A method for manufacturing a device on a substrate includes forming a layer structure on the substrate, forming an auxiliary layer on the layer structure, forming a planarization layer on the auxiliary layer and on the substrate, exposing the auxiliary layer by a chemical mechanical polishing process and removing at least partly the auxiliary layer to form a planar surface of the remaining auxiliary layer or of the layer structure and the planarization layer. The chemical mechanical polishing process has a first removal rate with respect to the planarization layer and a second removal rate with respect to the auxiliary layer and the first removal rate is greater than the second removal rate.

Method for manufacturing a device on a substrate

A method can be used for locally rendering a carbonic isolating layer conductive. In one embodiment, a laser beam is directed onto the carbonic isolating layer so as to convert amorphous carbon of the carbonic isolating layer into graphite-like carbon. In another embodiment, the carbonic layer is heated so as to form a conducting portion of the layer so that a lateral path through the conducting portion connects two circuit elements of the integrated circuit.

Chip comprising an integrated circuit, fabrication method and method for locally rendering a carbonic layer conductive

In one embodiment, a method of forming a semiconductor package comprises providing a first die having contact regions on a top surface but not on an opposite bottom surface. A dielectric liner layer is deposited under the bottom surface of the first die. The first die is attached with the deposited dielectric liner layer to a die paddle of a substrate. A bond layer is disposed between the substrate and the dielectric liner layer.

Semiconductor packages and methods of formation thereof

A structure and method of forming through substrate vias in forming semiconductor components are described. In one embodiment, the invention describes a method of forming the through substrate via by filling an opening with a first fill material and depositing a first insulating layer over the first fill material, the first insulating layer not being deposited on sidewalls of the fill material in the opening, wherein sidewalls of the first insulating layer form a gap over the opening. The method further includes forming a void by sealing the opening using a second insulating layer.

Through substrate via semiconductor components and methods of formation thereof

A chip includes an integrated circuit and a carbonic layer. The carbonic layer includes a graphite-like carbon, wherein a lateral conducting path through the graphite-like carbon electrically connects two circuit elements of the integrated circuit.

Growing community of inventors

Wuppertal, Germany

Uwe Hoeckele