Xilinx, Inc.

Usha Prabhu

Satish R Ganesan

Ralph D Wittig

Sundararajarao Mohan

Goran Bilski

David W Bennett

Jorge Ernesto Carrillo

Amit Kasat

Goran Hk Bilski

Paulo Luis Dutra

Navaneethan Sundaramoorthy

Sathyanarayanan Thammanur

A method of recreating instructions and data traces in a processor can include the step of fetching an instruction from an executable program in an order corresponding to sequential program counter (PC) values, obtaining a destination register from the fetched instruction and updating the destination register in a data structure with a value from a collected destination register corresponding to the PC value. The steps above can be repeated until all desired PC values and destination values are obtained.

Method and system to recreate instruction and data traces in an embedded processor

A fast linked multiprocessor network () including a plurality of processing modules (, and) implemented on a field programmable gate array () and a plurality of configurable uni-directional links () coupled among at least two of the plurality processing modules providing a streaming communication channel between at least two of the plurality of processing modules.

Method and system for fast linked processor in a system on a chip (SoC)

A multiprocessor system () includes a plurality of processing engines (and) including a software processing engine and a hardware processing engine implemented on a single silicon device defined by a single programming language and the single programming language tagged with at least one macro. The multiprocessor system further includes connectivity (and) between the plurality of processing engines defined by the single programming language and by the single programming language tagged with at least one macro.

Method and system for designing a multiprocessor

Method and apparatus for providing self-implementing hardware-software libraries is described. One aspect of the invention relates to designing an embedded system for an integrated circuit. A hardware platform is defined. A software platform is defined having a plurality of software components, including a library. Hardware component dependency data associated with the library is identified. At least one hardware component is added to the hardware platform in response to the hardware component dependency data.

Method and apparatus for providing self-implementing hardware-software libraries

Various approaches for generating a clock accurate simulation model from a circuit design description are disclosed. In one approach, a graph representation of the circuit design description is created. The graph representation includes nodes and edges. From the nodes in the graph representation, a plurality of register nodes are generated to correspond to respective register functions. Logic optimization is performed on nodes that represent combinational logic functions. For each register node and each output node, an evaluation equation is generated after performing logic optimization. For each clock cycle of a logic simulation, each evaluation equation is evaluated and produces an output value for the next clock cycle.

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West Lafayette, IN, United States of America

Usha Prabhu