Koninklijke Philips Corporation N.v.

St-ericsson Sa

Trub Ag

Gemalto Ag

Urs Fawer

Harald Bauer

Axel Hertwig

Stefan Egli

Paul Lippens

A multiprocessor system, more particularly for terminal devices of mobile radiotelephony, in which system are arranged on a common chip:

Memory sharing arrangement for an integrated multiprocessor system

Processor memory system

A method of operating a storage system comprising a main memory and a cache memory structured in address-related lines, in which cache memory can be loaded with data from the main memory and be read out by a processor as required. During the processor's access to data of a certain address in the cache memory, at which address certain data from the main memory which has a corresponding address is stored, a test is made to determine whether sequential data s stored at the next address in the cache memory; and this sequential data, if unavailable, can be loaded from the main memory in the cache memory via a prefetch, the latter only taking place when the processor accesses a predefined line section lying in a line.

Method of operating a storage system and storage system

Growing community of inventors

Baden, Switzerland

Urs Fawer