Avago Technologies General IP (singapore) Pte. Ltd.

Un Ha Kim

Jung Hyun Kim

Young Kwon

Sang Hwa Jung

A linearizer comprises a delay compensation circuit, an envelope reshaping circuit and a phase shift unit. The delay compensation circuit is configured to delay an input signal and to output a delayed input signal to a power amplifier. The envelope reshaping circuit is configured to detect an envelope of the input signal and to generate a reshaped envelope signal. The phase shift unit configured to provide an envelope reshaped capacitance based on the reshaped envelope signal to the delayed input signal to reshape the delayed input signal.

Linearizer and radio frequency power amplifier using same

A linearized power amplifier includes a first amplification stage having a first transistor for amplifying an input signal and outputting a pre-amplified signal, and a second amplification stage having a second transistor for amplifying the pre-amplified signal. A phase injection circuit, connected to the gate of the first transistor and the gate of the second transistor, adjusts the phase of the input signal based on the pre-amplified signal so as to compensate for AM-AM distortion and AM-PM distortion.

Power amplifier

In accordance with a representative embodiment, an impedance matching circuit for use at an output stage of a power amplifier is disclosed. The impedance matching circuit comprises: an input port for receiving a frequency band signal; and a plurality of paths, each path being allocated with a principal band signal to be transmitted therethrough and including a path on-off network and a fixed-value impedance matching network. Depending on a type of the received frequency band signal, the path on-off network is configured to activate a selected one of the plurality of paths by rendering an input impedance of the selected path to have a lower absolute magnitude so that the signal is transmitted therethrough, and to deactivate the remaining paths of the plurality of paths by rendering the input impedance thereof to have a higher absolute magnitude so that the signal is not transmitted therethrough. The fixed-value impedance matching network matches a load impedance of the output port of each path to the input impedance thereof, thereby rendering the input impedance thereof to have a prescribed reference value with respect to the principal band signal when said path is activated by the path on-off network.

Growing community of inventors

Seoul, South Korea

Un Ha Kim