Intel Corporation

Umberto Santoni

Philip Abraham

John Charles Weast

Nazar A Zaidi

Mark A Holler

Rahul Pal

Riccardo Mariani

Mike Morrison

Chin S Park

Mahesh Mamidipaka

Michael Mroczek

C Santhosh

Kenneth R Buckmann

Siang-Chun The

Jay M Diamond

An automated driving system includes a security companion subsystem to access data generated at a compute subsystem of the automated driving system, which indicates a determination by the compute subsystem associated with an automated driving task. The security companion subsystem determines whether the determination is safe based on the data. The security companion subsystem is configured to realize a higher safety integrity level than the compute subsystem.

Independent safety monitoring of an automated driving system

Systems, methods, and apparatuses relating to circuitry to implement lockstep of processor cores are described. In one embodiment, a hardware processor comprises a first processor core comprising a first control flow signature register and a first execution circuit, a second processor core comprising a second control flow signature register and a second execution circuit, and at least one signature circuit to perform a first state history compression operation on a first instruction that executes on the first execution circuit of the first processor core to produce a first result, store the first result in the first control flow signature register, perform a second state history compression operation on a second instruction that executes on the second execution circuit of the second processor core to produce a second result, and store the second result in the second control flow signature register.

Apparatuses, methods, and systems for hardware-assisted lockstep of processor cores

A method to check for redundancy in two or more data lines comprises receiving data on a first data line, computing a first cyclic redundancy check (CRC) value on the data of the first data line, performing an exclusive OR (XOR) function on the first CRC value with a stored memory value, and updating the stored memory value with a result of the XOR function, and repeating on additional data lines until a last line is processed such that an error is indicated if a final stored memory value is not zero. An apparatus to check that two cores are operating in lockstep comprises a first core comprising a first data checker, a second core comprising a second data checker, and a lockstep checker to compare an output of the first data checker with an output of the second data checker.

Hardware lockstep checking within a fault detection interval in a system on chip

The present invention is a method and apparatus to determine a similarity measure between first and second patterns. First and second storages store first and second feature vectors which represent the first and second patterns, respectively. A similarity estimator is coupled to the first and second storages to compute a similarity probability of the first and second feature vectors using a piecewise linear probability density function (PDF). The similarity probability corresponds to the similarity measure.

Pattern recognition based on piecewise linear probability density function

Only one pipe in superscalar microprocessor contains particular functional logic necessary to process a specific instruction. When the specific instruction appears in an instruction stream, the microprocessor replicates the specific instruction so that there are as many identical instructions in the stream as there are pipes. The identical instructions appear contiguously in the instruction stream. Each identical instruction is processed by a different one of the pipes. The pipe with the particular functional logic performs the necessary operations for the specific instruction while the other pipes treat the instruction as a null operation.

Method and apparatus for efficient pipelining

An adaptive distance calculating neural network classifier chip accepts high dimensionality input pattern vectors with up to 256 5-bit elements per vector and compares the input vector with up to 1024 prototype vectors stored on-chip by calculating the distance between the input vector and each of the prototype vectors. The classifier further provides for identifying up to 64 classes to which the prototype vectors belong. If the distance between input and prototype vector is less than a programmable threshold distance, the prototype fires and the class to which it belongs is identified. If prototype vectors belonging to more than one class fire, a probabilistic model based on Parzen windows may be invoked to resolve the classification by providing the relative probabilities of various class membership. The classifier chip is trainable by supplying appropriate training vectors and associated class membership. Distance and probability parameters are generated during training and are stored for use in the classification mode. Incremental training is also provided so that additional prototypes may be added to an existing base. In order to extend the classifier capacity, multichip operation is provided under the supervision of a system administrator controller/CPU.

Growing community of inventors

Scottsdale, AZ, United States of America

Umberto Santoni