Stmicroelectronics S.r.l.

Parades S.c.a.r.l.

Umberto Macri

Giuseppe D'Angelo

Mario Lavorgna

Giovanni Moselli

Alberto Ferrari

Stefano Baratto

Antonio Anastasio

Massimo Baleani

Francesco Giuffré

A processor system having a processor core, a plurality of modules connected to the processor core and configured to generate respective fault signals, and a fault managing unit connected to the processor core and to the plurality of modules. The fault managing unit is adapted to collect a first fault signal generated by a first module of the plurality of modules which is in a fault condition, analyze said collected first fault signal, and generate a first reaction signal to be selectively transmitted to said processor core and said first module.

Processor system and fault managing unit thereof

A control circuit is for an electric power plant including an asynchronous generator of an AC voltage, a motor to rotate a rotor of the asynchronous generator as a function of a first control signal of a developed motor torque, and a bank of capacitors coupled to the asynchronous generator and having a total capacitance varying as function of a second control signal. The control circuit may include a monitor circuit to monitor at least one parameter of the AC voltage, and a control signal generator circuit cooperating with the monitor circuit to generate the first and second control signals by soft-computing techniques both as a function of the frequency and of a representative value of an amplitude of the AC voltage to make the AC voltage have a desired amplitude and frequency.

Method and circuit for controlling an electric power plant

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Munich, Germany

Umberto Macri