Xilinx, Inc.

Umanath R Kamath

John K Jennings

Edward Cullen

Ionut C Cical

Diarmuid Collins

Adrian Lynam

Michael J Hart

James Karp

Darragh Walsh

Padraig Kelly

A temperature sensor includes a current source to produce a first bias current and a second bias current, a plurality of diodes, and temperature estimation circuitry. The plurality of diodes includes at least a first diode to receive the first bias current and a second diode to receive the second bias current. The temperature estimate circuitry measures a first voltage bias across the first diode resulting from the first bias current and a second voltage bias across the second diode resulting from the second bias current, and estimates a temperature of an environment of the temperature sensor based at least in part on the first voltage bias and the second voltage bias. The temperature sensor further includes error detection circuitry to measure at least one of the first or second bias currents and determine an amount of error in the temperature estimate based at least in part on the measurement.

Bias current variation correction for complementary metal-oxide-semiconductor (CMOS) temperature sensor

A control circuit used in an integrated circuit device is described. The control circuit comprises a startup timer configured to generate a startup timing signal; a startup circuit configured to generate a startup control signal; and a switching element coupled between the startup circuit and a load; wherein the switching element applies the startup control signal to the load during a startup period associated with the startup timing signal. A method of controlling an operation of an integrated circuit device is also described.

Control circuit for and method of controlling an operation of an integrated circuit device

An example dynamic element matching (DEM) circuit includes: a plurality of bipolar junction transistors (BJTs), each of the plurality of BJTs having a base terminal and a collector terminal coupled to electrical ground; a plurality of pairs of force switches, each pair of force switches coupled to an emitter of a respective one of the plurality of BJTs; a plurality of pairs of sense switches, where each pair of sense switches is coupled to the emitter of a respective one of the plurality of BJTs, a first switch in each pair of sense switches is coupled to a first node, and a second switch in each pair of sense switches is coupled to a second node; a first current source coupled to a first switch in each pair of force switches; and a second current source coupled to a second switch in each pair of force switches.

Dynamic element matching in an integrated circuit

Methods and apparatus are described for detecting both single event latch-up (SEL) and electrical overvoltage stress (EOS) using a single, reconfigurable detection circuit. One example circuit capable of detecting a latch-up state and an overvoltage condition generally includes an impedance element coupled to a power supply node; a voltage divider coupled to the power supply node; a multiplexer having a first input coupled to a tap of the voltage divider, a second input coupled to a first portion of the impedance element, and a third input coupled to a second portion of the impedance element; a reference generator; and an analog-to-digital converter (ADC) having a first input coupled to an output of the multiplexer and a second input coupled to an output of the reference generator.

Configurable single event latch-up (SEL) and electrical overvoltage stress (EOS) detection circuit

An example voltage reference circuit includes: a reference circuit comprising a first circuit configured to generate a proportional-to-temperature current and corresponding first control voltage and a second circuit configured to generate a complementary-to-temperature current and corresponding second control voltage; a first current source coupled to a first load circuit, the first current source generating a sum current of the proportional-to-temperature current and the complementary-to-temperature current in response to the first and second control voltages, the first load circuit generating a zero temperature coefficient (Tempco) voltage from the sum current; and a second current source coupled to a second load circuit, the second current source generating the sum current of the proportional-to-temperature current and the complementary-to-temperature current in response to the first and second control voltages, the second load circuit generating a negative Tempco voltage from the sum current and the complementary-to-temperature current.

Programmable temperature coefficient analog second-order curvature compensated voltage reference

A circuit for implementing a multifunction output generator is described. The circuit comprises an amplifier circuit having a first input and a second input; a voltage generator coupled at a first node to a first input of the amplifier circuit; a controllable current source configured to provide a variable current to the first node; and a switching circuit enabling the operation of the amplifier circuit in a first mode for sensing a temperature and a second mode for providing a reference voltage. A method of implementing a multifunction output generator is described.

Circuit for and method of implementing a multifunction output generator

An example method of trimming a voltage reference in an integrated circuit (IC) includes at a first temperature, sequencing through a first plurality of trim codes for a reference circuit of the voltage reference configured to generate a proportional-to-temperature current and a corresponding first control voltage, and a complementary-to-temperature current and a corresponding second control voltage. The method further includes measuring a voltage output of the voltage reference for each of the first plurality of trim codes to obtain first voltage output values. The method further includes at a second temperature, sequencing through a second plurality of trim codes for the reference circuit. The method further includes measuring the voltage output of the voltage reference for each of the second plurality of trim codes to obtain second voltage output values. The method further includes selecting a trim code for the reference circuit based on the first voltage output values and the second voltage output values.

Trim techniques for voltage reference circuits

An integrated circuit includes a reference voltage circuit. The reference voltage circuit includes a bipolar junction transistor (BJT) configured to receive a first current during a first phase of a clock cycle to generate a first base-emitter junction voltage, and receive a second current during a second phase of the clock cycle to generate a second base-emitter junction voltage. The reference voltage circuit includes a switched capacitor circuit configured to provide a reference voltage associated with the first base-emitter junction voltage and the second base-emitter junction voltage.

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Citywest, Ireland

Umanath R Kamath