Epcos Ag

Siemens Aktiengesellschaft

Qualcomm Incorporated

Ulrich Knauer

Werner Ruile

Anton Leidl

Charles Binninger

Helmut Zottl

Hans-Peter Feuerbaum

Gerd Scholl

Markus Hauser

Tomasz Jewula

Ulrich Wolff

Rudolf Nuessl

Andreas Bergmann

Markus Mayer

Christoph Eggs

Ulrike Roesler

Johann Otto

Ulrike Rösler

Peter Fazekas

Wolfgang Sauer

Michael Jakob

Gerd Riha

Karl-Christian Wagner

Clemens Ruppel

Evelyn Riha

Bruno Fuerbacher

Manfred Maisch

Lijun Peng

A metallization, for carrying current in an electrical component, includes a bottom layer overlying a substrate surface and includes titanium (Ti) or a titanium compound as main constituent. An upper layer overlies the bottom layer and includes copper (Cu) as main constituent. The bottom layer and the upper layer form a base layer. A top layer is in direct contact with the upper layer and includes aluminum (Al) as main constituent. The base layer further includes a middle layer, consisting of silver, that is arranged between the bottom layer and the upper layer.

Metallization having high power compatibility and high electrical conductivity

A method for producing a dielectric layer on the surface of a component is described. In particular embodiments, a dielectric layer having a planar surface can be generated over a substrate topography having raised structures. In a trimming process, a component property, which depends on the thickness or the third topography of the dielectric layer, is adjusted.

Method for producing a dielectric layer on a component

A metallization can be used for components working with acoustic waves. The metallization includes a base having a bottom layer comprising titanium, and an upper layer comprising copper. A top layer of the metallization disposed on the base comprises aluminum.

A component is designed to work with acoustic waves. Embodiments have an improved temperature gradient of the frequency range and have increased performance strength. To this end, the component includes a stack of layers having a lower bonding layer, an electrode layer, an upper bonding layer, a compensation layer, and a trimming layer.

Component working with acoustic waves having reduced temperature coefficient of frequencies and method for producing same

Elements and methods for forming elements that operate with acoustic waves are disclosed. The element includes a piezoelectric electric substrate that has a first thermal coefficient of expansion, electrically conducting element structures on an upper side of the substrate, a compensation layer on an underside of the substrate, and an SiOlayer over the element structures.

SAW-component having a reduced temperature path and method for the production thereof

An apparatus including a piezoelectric substrate having at least one transducer electrode structure. The structure having a metallization formed by one or more metals with a mean specific density that is at least 50% higher than that of aluminum. The structure having a compensation layer that is applied fully or partially over the metallization. The compensation layer is of a material having a temperature dependence of elastic constants that counteracts the temperature coefficient of frequency of the substrate. The compensation layer has a thickness that is less than 15% of an acoustic wavelength of a wave capable of propagation in the structure.

SAW component having an improved temperature coefficient

For a component operating with acoustic waves, it is proposed to arrange the electrode structure over a mechanically stable adaptation layer that serves to dissipate the electromechanical stresses. Further improvements of the output compatibility are achieved with additional intermediate layers and passivation layers applied on the sides or the entire surface over the electrode structure.

Electrode structure for electro-acoustic component and method for producing said structure

A method for representing logic changes of state occurring at a plurality of adjacent circuit nodes in an integrated circuit in the form of a logic image employs a pulsed electron probe which always scans a same path in the x-direction on the integrated circuit and the phase of the electron pulses comprising the pulsed electron probe is continuously shifted for each new scanning operation. The integrated circuit can be imaged up to the edge of a recording or field of view limit and it is only at this limit that the y-deflection of the pulsed electron probe is fixed. Very small spacings, such as those occurring between adjacent integrated circuit tracks, can thus be reliably imaged on the picture screen of the scanning electron microscope.

Method for representing logical status changes of a plurality of

A method for measuring a resistance and a capacitance of an electronic component utilizes electron beam measuring technology to impress a current I.sub.A by means of a pulsed electron beam on the component. A potential curve U(t) which arises during the pulse on the electronic component as a result of the impressed current is utilized together with the known current to determine the resistance R and the capacitance C by means of an appropriate selection of two measuring points U(t.sub.1) and U(t.sub.2) on the potential curve.

Method for measuring resistances and capacitances of electronic

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Munich, Germany

Ulrich Knauer