Samsung Sdi Co., Inc.

Samsung Mobile Display Co., Ltd.

Samsung Display Co., Ltd.

Ul-Ho Lee

Jae-Bon Koo

Sang-Il Park

Ki-Yong Lee

Ji-Yong Park

Jin-Soo Kim

Jin-Woung Jung

Chang-Gyu Lee

Keum-Nam Kim

Ji-yong Park

Hye-Dong Kim

Min-Chul Suh

Nam-Choul Yang

Ho-Kyoon Chung

Hye-hyang Park

Deuk-Jong Kim

Hye-Hyang Park

Tae-Wook Kang

Mi-Sook Suh

The present invention relates to a flat panel display device comprising a polysilicon thin film transistor and a method of manufacturing the same. Grain sizes of polysilicon grains formed in active channel regions of thin film transistors of a driving circuit portion and a pixel portion of the flat panel display device are different from each other. Further, the flat panel display device comprising P-type and N-type thin film transistors having different particle shapes from each other.

Flat panel display device comprising polysilicon thin film transistor and method of manufacturing the same

A high-speed flat panel display has thin film transistors in a pixel array portion in which a plurality of pixels are arranged and a driving circuit portion for driving the pixels of the pixel array portion, which have different resistance values than each other or have different geometric structures than each other. The flat panel display comprises a pixel array portion where a plurality of pixels are arranged, and a driving circuit portion for driving the pixels of the pixel array portion. The thin film transistors in the pixel array portion and the driving circuit portion have different resistance values in their gate regions or drain regions than each other, or have different geometric structures than each other. One thin film transistor has a zigzag shape in its gate region or drain region or has an offset region.

Flat panel display

An electroluminescent display device includes a display panel having scan lines, data lines, and pixel circuits. The pixel circuit includes an electroluminescent element having a first electrode layer, a first insulation film, and an emitting layer for displaying images. A driving circuit is coupled to the electroluminescent element. The first electrode layer is superimposed on a power source line, a scan line, or both, with a second insulation film therebetween.

Organic electroluminescent display device and manufacturing method thereof

The present invention relates to a flat panel display device comprising a polycrystalline silicon thin film transistor and provides a flat panel display device having improved characteristics by having a different number of grain boundaries included in polycrystalline silicon thin film formed in active channel regions of a driving circuit portion and active channel regions of pixel portion. This may be achieved by having a different number of grain boundaries included in the polycrystalline silicon thin film formed in active channel regions of a switching thin film transistor and a driving thin film transistor formed in the pixel portion, and by having a different number of grain boundaries included in polycrystalline silicon thin film formed in active channel regions of a thin film transistor for driving the pixel portion for each red, green and blue of the pixel portion. Further, this may be achieved by having a different number of grain boundaries included in polycrystalline silicon formed in active channel regions of an NMOS thin film transistor and a PMOS thin film transistor for forming CMOS transistor used in flat panel display device, thereby constructing a thin film transistor to obtain the improved characteristics for each transistor.

Flat panel display device with polycrystalline silicon thin film transistor

A method for manufacturing a diode-connected transistor includes forming a silicon layer on a substrate, a first insulation film on the silicon layer, and a gate electrode on the first insulation film. The method also includes forming a source region, a channel region, and a drain region in the silicon layer and forming a second insulation film on the gate electrode. A source electrode and a drain electrode are formed on the second insulation film and are coupled to the source region and the drain region, respectively. The method further includes coupling the drain electrode to the gate electrode through a contact hole that is vertically above the channel region.

Method for manufacturing diode-connected transistor and image display device using the same

Disclosed is a flat panel display capable of enhancing a white balance by making a doping concentration or shape and size of drain offset regions of driving transistors different, in R, G and B unit pixels of each pixel. A flat panel display, comprises a plurality of pixels, where each of pixels including R, G and B unit pixels to embody red (R), green (G) and blue (B) colors, respectively. Each of the unit pixels includes a transistor with source/drain regions. Transistors of at least two unit pixels of the R, G and B unit pixels have drain regions of different geometric structures. In each unit pixel, a resistance value of the drain region of the transistor to drive a light-emitting device having the highest luminous efficiency among the transistors is higher than that of the drain region of a transistor to drive the light-emitting device having a relatively low luminous efficiency.

Flat panel display with improved white balance

A top-emitting organic light-emitting device can prevent a voltage drop by electrically coupling a cathode bus line to a cathode electrode. A method for fabricating the same is also disclosed. The flat panel display device comprises an insulating substrate having a pixel region and a non-pixel region, a first electrode arranged in the pixel region. a second electrode arranged in the pixel region and the non-pixel region, an organic emission layer and a charge transporting layer formed between the first electrode and the second electrode of the pixel region, and an electrode line formed in the pixel region and the non-pixel region. The electrode line and the second electrode are electrically and directly coupled to each other in the non-pixel region.

Flat panel display device capable of reducing or preventing a voltage drop and method of fabricating the same

An organic EL display panel having display pixels with an improved aperture ratio. A display pixel includes a control electrode line coupled to control electrodes of first and second transistors and a main electrode of a fourth transistor, and a power electrode line provided substantially in parallel with a data line and coupled to a main electrode of the first transistor. Channels of the first and second transistors are formed substantially in parallel with a scan line. A node of the control electrode line for coupling the control electrodes of the first and second transistors is arranged in a direction substantially perpendicular to that of the scan line, and a portion of the control electrode line extended to the main electrode of the fourth transistor is formed substantially in parallel with the power electrode line in a substantially vertical direction, and forms a capacitor together with the power electrode line.

Organic electroluminescent display panel

A method for manufacturing a transistor includes forming a semiconductor layer on a substrate, a first insulation film on the semiconductor layer, and a gate electrode on the first insulation film. The method also includes forming a source region, a channel region, and a drain region in the semiconductor layer and forming a second insulation film on the gate electrode. A source electrode and a drain electrode are formed on the second insulation film and are coupled to the source region and the drain region, respectively. The method further includes coupling the drain electrode to the gate electrode through a contact hole that is vertically above the channel region.

Method for manufacturing transistor and image display device using the same

A flat panel display with good color mixture of three primary colors to achieve different hues and little signal delay is provided. The display includes signal lines including scan lines and data lines intersecting the scan lines, both arranged along straight lines. Red, green, and blue pixel driving circuit regions are defined by the intersection of the scan lines and the data lines. The pixel driving circuit regions having the same color are arranged adjacent to one another along a column direction. Red, green, and blue pixel driving circuits are placed in the pixel driving circuit regions and are coupled to the red, green, and blue pixel electrodes. The pixel electrodes are adjacent to pixel electrodes of a different color along both row and column directions.

A flexible flat panel display where nanoparticles are used for the active layer of the TFTs and the substrate is flexible and can be manufactured at room temperature, a flat panel display device having the same, a method of manufacturing a TFT, a method of manufacturing a flat panel display device, and a method of manufacturing a donor sheet. In making the TFTs in the display, a donor sheet is used to transfer the nanoparticles from the sheet to the substrate. The thin film transistor is placed on a substrate and includes a channel region which has at least one P-type or N-type nanoparticle arranged in a lengthwise direction, wherein the lengthwise direction of the P-type or N-type nanoparticles is parallel to a P-type or an N-type nanoparticle line partitioned off on the substrate.

TFT, flat panel display device having the same, method of manufacturing TFT, method of manufacturing flat panel display device, and method of manufacturing donor sheet

The present invention discloses a flat panel display capable of improving a white balance by using offset lengths or doping concentrations of offset regions between multi gates of driving transistors in R, G, and B unit pixels. The flat panel display comprises a plurality of pixels, where each of the pixels includes R, G and B unit pixels to embody red (R), green (G) and blue (B) colors, respectively, and each of the unit pixels including a transistor with multi gates. Transistors of at least two unit pixels of the R, G, and B unit pixels have offset regions with different geometric structures between the multi gates from one another. An offset region of a transistor for driving a light-emitting device having the highest luminous efficiency among the transistors of the R, G, and B unit pixels, is formed to have a longer offset length or a lower doping concentration, than those of offset regions of transistors for driving light-emitting devices having relative lower luminous efficiency.

Growing community of inventors

Yongin-si, South Korea

Ul-Ho Lee